The IPUv3 primary plane doesn't support partial off screen.
So, this patch separates plane check logics for primary plane and overlay
plane and adds more limitations on the primary plane.

Signed-off-by: Liu Ying <gnuiyl at gmail.com>
---
v3->v4:
* None.

v2->v3:
* None.

v1->v2:
* Remove an unnecessary copy to address Philipp's comment.
 drivers/gpu/drm/imx/ipuv3-plane.c | 67 ++++++++++++++++++++++-----------------
 1 file changed, 38 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c 
b/drivers/gpu/drm/imx/ipuv3-plane.c
index a4bb441..cd7eb26 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -199,37 +199,46 @@ int ipu_plane_mode_set(struct ipu_plane *ipu_plane, 
struct drm_crtc *crtc,
        if (src_w != crtc_w || src_h != crtc_h)
                return -EINVAL;

-       /* clip to crtc bounds */
-       if (crtc_x < 0) {
-               if (-crtc_x > crtc_w)
+       if (ipu_plane->base.type == DRM_PLANE_TYPE_PRIMARY) {
+               /* full plane doesn't support partial off screen */
+               if (crtc_x || crtc_y || crtc_w != mode->hdisplay ||
+                       crtc_h != mode->vdisplay)
                        return -EINVAL;
-               src_x += -crtc_x;
-               src_w -= -crtc_x;
-               crtc_w -= -crtc_x;
-               crtc_x = 0;
-       }
-       if (crtc_y < 0) {
-               if (-crtc_y > crtc_h)
-                       return -EINVAL;
-               src_y += -crtc_y;
-               src_h -= -crtc_y;
-               crtc_h -= -crtc_y;
-               crtc_y = 0;
-       }
-       if (crtc_x + crtc_w > mode->hdisplay) {
-               if (crtc_x > mode->hdisplay)
-                       return -EINVAL;
-               crtc_w = mode->hdisplay - crtc_x;
-               src_w = crtc_w;
-       }
-       if (crtc_y + crtc_h > mode->vdisplay) {
-               if (crtc_y > mode->vdisplay)
+
+               /* full plane minimum width is 13 pixels */
+               if (crtc_w < 13)
                        return -EINVAL;
-               crtc_h = mode->vdisplay - crtc_y;
-               src_h = crtc_h;
-       }
-       /* full plane minimum width is 13 pixels */
-       if (crtc_w < 13 && (ipu_plane->dp_flow != IPU_DP_FLOW_SYNC_FG))
+       } else if (ipu_plane->base.type == DRM_PLANE_TYPE_OVERLAY) {
+               /* clip to crtc bounds */
+               if (crtc_x < 0) {
+                       if (-crtc_x > crtc_w)
+                               return -EINVAL;
+                       src_x += -crtc_x;
+                       src_w -= -crtc_x;
+                       crtc_w -= -crtc_x;
+                       crtc_x = 0;
+               }
+               if (crtc_y < 0) {
+                       if (-crtc_y > crtc_h)
+                               return -EINVAL;
+                       src_y += -crtc_y;
+                       src_h -= -crtc_y;
+                       crtc_h -= -crtc_y;
+                       crtc_y = 0;
+               }
+               if (crtc_x + crtc_w > mode->hdisplay) {
+                       if (crtc_x > mode->hdisplay)
+                               return -EINVAL;
+                       crtc_w = mode->hdisplay - crtc_x;
+                       src_w = crtc_w;
+               }
+               if (crtc_y + crtc_h > mode->vdisplay) {
+                       if (crtc_y > mode->vdisplay)
+                               return -EINVAL;
+                       crtc_h = mode->vdisplay - crtc_y;
+                       src_h = crtc_h;
+               }
+       } else
                return -EINVAL;
        if (crtc_h < 2)
                return -EINVAL;
-- 
2.7.4

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