Read from DPCD receiver capability field for the following
features:
- max TMDS clock rate
- max bits per component
- single or dual link support
- high color depth support
Signed-off-by: Mika Kahola <mika.kahola at intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 5 +++++
include/drm/drm_dp_helper.h | 14 ++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index c5bec6f..f5cf706 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -451,6 +451,11 @@ int drm_dp_bd(struct drm_dp_aux *aux, struct drm_dp_bd *bd)
if (bd->type & DP_DS_PORT_TYPE_VGA) {
bd->dfp.vga.dot_clk = info[1] * 8 * 1000;
bd->dfp.vga.bpc = info[2] & DP_DS_VGA_MAX_BPC_MASK;
+ } else if (bd->type & DP_DS_PORT_TYPE_DVI) {
+ bd->dfp.dvi.tmds_clk = info[1] * 2500;
+ bd->dfp.dvi.bpc = info[2] & DP_DS_VGA_MAX_BPC_MASK;
+ bd->dfp.dvi.dual_link = info[3] & DP_DS_DVI_DUAL_LINK;
+ bd->dfp.dvi.hi_color_depth = info[3] &
DP_DS_DVI_HI_COLOR_DEPTH;
}
}
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index fe6cfdc..da82459 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -220,6 +220,9 @@
# define DP_DS_VGA_10BPC 1
# define DP_DS_VGA_12BPC 2
# define DP_DS_VGA_16BPC 3
+/* offset 3 for DVI dual link and high color depth */
+# define DP_DS_DVI_DUAL_LINK (1<<1)
+# define DP_DS_DVI_HI_COLOR_DEPTH (1<<2)
/* link configuration */
#define DP_LINK_BW_SET 0x100
@@ -810,6 +813,16 @@ struct drm_dp_vga {
};
/*
+ * DP to DVI
+ */
+struct drm_dp_dvi {
+ int tmds_clk;
+ uint8_t bpc;
+ bool dual_link;
+ bool hi_color_depth;
+};
+
+/*
* Branch device
*/
struct drm_dp_bd {
@@ -818,6 +831,7 @@ struct drm_dp_bd {
bool hpd;
union {
struct drm_dp_vga vga;
+ struct drm_dp_dvi dvi;
} dfp;
};
--
1.9.1
