dss_pll_calc_b() takes HDMI TMDS clock rate as a parameter. To make
dss_pll_calc_b() usable for non-HDMI users, change the function to take
clkout rate as parameter, and also change the current users of
dss_pll_calc_b() to accommodate that.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen at ti.com>
---
drivers/gpu/drm/omapdrm/dss/dss.h | 2 +-
drivers/gpu/drm/omapdrm/dss/hdmi4.c | 3 +++
drivers/gpu/drm/omapdrm/dss/hdmi5.c | 3 +++
drivers/gpu/drm/omapdrm/dss/pll.c | 17 ++++++++++-------
4 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h
b/drivers/gpu/drm/omapdrm/dss/dss.h
index 11d9805e3ac3..4fd06dc41cb3 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -443,7 +443,7 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned
long clkin,
dss_pll_calc_func func, void *data);
bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
- unsigned long target_tmds, struct dss_pll_clock_info *cinfo);
+ unsigned long target_clkout, struct dss_pll_clock_info *cinfo);
int dss_pll_write_config_type_a(struct dss_pll *pll,
const struct dss_pll_clock_info *cinfo);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index eaf2bd6ffe7d..b1a8926c5b81 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -186,6 +186,9 @@ static int hdmi_power_on_full(struct omap_dss_device
*dssdev)
if (p->double_pixel)
pc *= 2;
+ /* DSS_HDMI_TCLK is bitclk / 10 */
+ pc *= 10;
+
dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
pc, &hdmi_cinfo);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 435061475c30..33998f7f51ab 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -198,6 +198,9 @@ static int hdmi_power_on_full(struct omap_dss_device
*dssdev)
if (p->double_pixel)
pc *= 2;
+ /* DSS_HDMI_TCLK is bitclk / 10 */
+ pc *= 10;
+
dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
pc, &hdmi_cinfo);
diff --git a/drivers/gpu/drm/omapdrm/dss/pll.c
b/drivers/gpu/drm/omapdrm/dss/pll.c
index bdfc88a7caaf..6daf7bc3a67a 100644
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -248,18 +248,21 @@ bool dss_pll_calc_a(const struct dss_pll *pll, unsigned
long clkin,
return false;
}
+/*
+ * This calculates a PLL config that will provide the target_clkout rate
+ * for clkout. Additionally clkdco rate will be the same as clkout rate
+ * when clkout rate is >= min_clkdco.
+ */
bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin,
- unsigned long target_tmds, struct dss_pll_clock_info *cinfo)
+ unsigned long target_clkout, struct dss_pll_clock_info *cinfo)
{
unsigned long fint, clkdco, clkout;
- unsigned long target_bitclk, target_clkdco;
+ unsigned long target_clkdco;
unsigned long min_dco;
unsigned n, m, mf, m2, sd;
const struct dss_pll_hw *hw = pll->hw;
- DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds);
-
- target_bitclk = target_tmds * 10;
+ DSSDBG("clkin %lu, target clkout %lu\n", clkin, target_clkout);
/* Fint */
n = DIV_ROUND_UP(clkin, hw->fint_max);
@@ -267,11 +270,11 @@ bool dss_pll_calc_b(const struct dss_pll *pll, unsigned
long clkin,
/* adjust m2 so that the clkdco will be high enough */
min_dco = roundup(hw->clkdco_min, fint);
- m2 = DIV_ROUND_UP(min_dco, target_bitclk);
+ m2 = DIV_ROUND_UP(min_dco, target_clkout);
if (m2 == 0)
m2 = 1;
- target_clkdco = target_bitclk * m2;
+ target_clkdco = target_clkout * m2;
m = target_clkdco / fint;
clkdco = fint * m;
--
2.5.0
