On Nov 16, 2011, at 6:11 PM, Matthew Garrett wrote:
On Wed, Nov 16, 2011 at 06:03:15PM +0100, Michel Dänzer wrote:
I thought the main reason for the delay wasn't broken hardware but to
avoid constantly ping-ponging the vblank IRQ between on and off with
apps which regularly neeed the vblank counter value, as that could
make
the counter unreliable. Maybe I'm misremembering though.
If turning it on and off results in the counter value being wrong then
surely that's a hardware problem? I've tested that turning it on
and off
between every IRQ still gives valid counter values on sandybridge.
--
Matthew Garrett | mj...@srcf.ucam.org
On Wed, Nov 16, 2011 at 06:03:15PM +0100, Michel Dänzer wrote:
>Even if I'm not, lowering the delay shouldn't be a problem, so long as
>it's long enough that at least apps which need the vblank counter
every
>or every other frame don't cause the IRQ to ping-pong. But that
>shouldn't depend on the hardware.
Hi, and thanks Michel for cc'ing me,
It's not broken hardware, but fast ping-ponging it on and off can
make the vblank counter and vblank timestamps unreliable for apps
that need high timing precision, especially for the ones that use the
OML_sync_control extensions for precise swap scheduling. My target
application is vision science
neuroscience, where (sub-)milliseconds often matter for visual
stimulation.
I think making the vblank off delay driver specific via these patches
is a good idea. Lowering the timeout to something like a few refresh
cycles, maybe somewhere between 50 msecs and 100 msecs would be also
fine by me. I still would like to keep some drm config option to
disable or override the vblank off delay by users.
The intel and radeon kms drivers implement everything that's needed
to make it mostly work. Except for a small race between the cpu and
gpu in the vblank_disable_and_save() function <http://lxr.free-
electrons.com/source/drivers/gpu/drm/drm_irq.c#L101> and
drm_update_vblank_count(). It can cause an off-by-one error when
reinitializing the drm vblank counter from the gpu's hardware counter
if the enable/disable function is called at the wrong moment while
the gpu's scanout is inside the vblank interval, see comments in the
code. I have some sketchy idea for a patch that could detect when the
race happens and retry hw counter queries to fix this. Without that
patch, there's some chance between 0% and 4% of being off-by-one.
On current nouveau kms, disabling vblank irqs guarantees you wrong
vblank counts and wrong vblank timestamps after turning them on
again, because the kms driver doesn't implement the hook for hardware
vblank counter query correctly. The drm vblank counter misses all
counts during the vblank irq off period. Other timing related hooks
are missing as well. I have a couple of patches queued up and some
more to come for the ddx and kms driver to mostly fix this. NVidia
gpu's only have hardware vblank counters for NV-50 and later, fixing
this for earlier gpu's would require some emulation of a hw vblank
counter inside the kms driver.
Apps that rely on the vblank counter being totally reliable over long
periods of time currently would be in a bad situation with a lowered
vblank off delay, but that's probably generally not a good
assumption. Toolkits like mine, which are more paranoid, currently
can work fine as long as the off delay is at least a few video
refresh cycles. I do the following for scheduling a reliably timed swap:
1. Query current vblank counter current_msc and vblank timestamp
current_ust.
2. Calculate a target vblank count target_msc, based on current_msc,
current_ust and some target time from usercode.
3. Schedule bufferswap for target_msc.
As long as the vblank off delay is long enough so that vblanks don't
get turned off between 1. and 3, everything is fine, otherwise bad
things will happen.
Keeping a way to override the default off delay would be good to
allow poor scientists to work around potentially broken drivers or
gpu's in the future. @Matthew: I'm appealing here to your ex-
Drosophila biologist heritage ;-)
thanks,
-mario
*********************************************************************
Mario Kleiner
Max Planck Institute for Biological Cybernetics
Spemannstr. 38
72076 Tuebingen
Germany
e-mail: mario.klei...@tuebingen.mpg.de
office: +49 (0)7071/601-1623
fax: +49 (0)7071/601-616
www: http://www.kyb.tuebingen.mpg.de/~kleinerm
*********************************************************************
"For a successful technology, reality must take precedence
over public relations, for Nature cannot be fooled."
(Richard Feynman)
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