Dave,

Please pull this series into drm-fixes for 3.2!

Thanks,
Thomas



On 11/28/2011 01:19 PM, Thomas Hellstrom wrote:
The driver implements the needed resource management required
to use that register.

Signed-off-by: Thomas Hellstrom<thellst...@vmware.com>
Reviewed-by: Jakob Bornecrantz<ja...@vmware.com>
---
  drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c  |    8 +++++++-
  drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c |    8 +++++++-
  2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
index 03bbc2a..a0c2f12 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
@@ -33,6 +33,7 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
  {
        __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
        uint32_t fifo_min, hwversion;
+       const struct vmw_fifo_state *fifo =&dev_priv->fifo;

        if (!(dev_priv->capabilities&  SVGA_CAP_EXTENDED_FIFO))
                return false;
@@ -41,7 +42,12 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
        if (fifo_min<= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
                return false;

-       hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION);
+       hwversion = ioread32(fifo_mem +
+                            ((fifo->capabilities&
+                              SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
+                             SVGA_FIFO_3D_HWVERSION_REVISED :
+                             SVGA_FIFO_3D_HWVERSION));
+
        if (hwversion == 0)
                return false;

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index 3f63435..a9e2193 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -58,8 +58,14 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
        case DRM_VMW_PARAM_FIFO_HW_VERSION:
        {
                __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
-
-               param->value = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION);
+               const struct vmw_fifo_state *fifo =&dev_priv->fifo;
+
+               param->value =
+                       ioread32(fifo_mem +
+                                ((fifo->capabilities&
+                                  SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
+                                 SVGA_FIFO_3D_HWVERSION_REVISED :
+                                 SVGA_FIFO_3D_HWVERSION));
                break;
        }
        default:

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel

Reply via email to