On Thu, 2017-05-11 at 09:12 -0700, Clint Taylor wrote:
>
> On 05/11/2017 02:57 AM, Jani Nikula wrote:
> > From: Clint Taylor <clinton.a.tay...@intel.com>
> >
> > The Analogix 7737 DP to HDMI converter requires reduced M and N values
> > when to operate correctly at HBR2. Detect this IC by its OUI value of
> > 0x0022B9 via the DPCD quirk list.
> >
> > v2 by Jani: Rebased on the DP quirk database
> >
> > Fixes: 9a86cda07af2 ("drm/i915/dp: reduce link M/N parameters")
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93578
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100755
> > Cc: Jani Nikula <jani.nik...@intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
> > Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Tested-by: Clinton Taylor <clinton.a.tay...@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
>
> > Signed-off-by: Clint Taylor <clinton.a.tay...@intel.com>
> > Signed-off-by: Jani Nikula <jani.nik...@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 3 ++-
> > drivers/gpu/drm/i915/intel_display.c | 22 ++++++++++++++--------
> > drivers/gpu/drm/i915/intel_dp.c | 15 +++++++++++----
> > drivers/gpu/drm/i915/intel_dp_mst.c | 4 +++-
> > drivers/gpu/drm/i915/intel_drv.h | 2 ++
> > 5 files changed, 32 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index ff3574a56812..d34412673d61 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -563,7 +563,8 @@ struct intel_link_m_n {
> >
> > void intel_link_compute_m_n(int bpp, int nlanes,
> > int pixel_clock, int link_clock,
> > - struct intel_link_m_n *m_n);
> > + struct intel_link_m_n *m_n,
> > + bool reduce_m_n);
> >
> > /* Interface history:
> > *
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index bf9020da8b80..46ac46ca976c 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -6116,7 +6116,7 @@ static int ironlake_fdi_compute_config(struct
> > intel_crtc *intel_crtc,
> > pipe_config->fdi_lanes = lane;
> >
> > intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock,
> > - link_bw, &pipe_config->fdi_m_n);
> > + link_bw, &pipe_config->fdi_m_n, false);
> >
> > ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config);
> > if (ret == -EINVAL && pipe_config->pipe_bpp > 6*3) {
> > @@ -6292,7 +6292,8 @@ intel_reduce_m_n_ratio(uint32_t *num, uint32_t *den)
> > }
> >
> > static void compute_m_n(unsigned int m, unsigned int n,
> > - uint32_t *ret_m, uint32_t *ret_n)
> > + uint32_t *ret_m, uint32_t *ret_n,
> > + bool reduce_m_n)
> > {
> > /*
> > * Reduce M/N as much as possible without loss in precision. Several DP
> > @@ -6300,9 +6301,11 @@ static void compute_m_n(unsigned int m, unsigned int
> > n,
> > * values. The passed in values are more likely to have the least
> > * significant bits zero than M after rounding below, so do this first.
> > */
> > - while ((m & 1) == 0 && (n & 1) == 0) {
> > - m >>= 1;
> > - n >>= 1;
> > + if (reduce_m_n) {
> > + while ((m & 1) == 0 && (n & 1) == 0) {
> > + m >>= 1;
> > + n >>= 1;
> > + }
> > }
> >
> > *ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX);
> > @@ -6313,16 +6316,19 @@ static void compute_m_n(unsigned int m, unsigned
> > int n,
> > void
> > intel_link_compute_m_n(int bits_per_pixel, int nlanes,
> > int pixel_clock, int link_clock,
> > - struct intel_link_m_n *m_n)
> > + struct intel_link_m_n *m_n,
> > + bool reduce_m_n)
> > {
> > m_n->tu = 64;
> >
> > compute_m_n(bits_per_pixel * pixel_clock,
> > link_clock * nlanes * 8,
> > - &m_n->gmch_m, &m_n->gmch_n);
> > + &m_n->gmch_m, &m_n->gmch_n,
> > + reduce_m_n);
> >
> > compute_m_n(pixel_clock, link_clock,
> > - &m_n->link_m, &m_n->link_n);
> > + &m_n->link_m, &m_n->link_n,
> > + reduce_m_n);
> > }
> >
> > static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 4a6feb6a69bd..59f3dbb242a6 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1568,13 +1568,17 @@ bool intel_dp_read_desc(struct intel_dp *intel_dp)
> > if (!__intel_dp_read_desc(intel_dp, desc))
> > return false;
> >
> > + intel_dp->quirks = drm_dp_get_quirks(desc->oui, sizeof(desc->oui),
> > + drm_dp_is_branch(intel_dp->dpcd));
> > +
> > dev_id_len = strnlen(desc->device_id, sizeof(desc->device_id));
> > - DRM_DEBUG_KMS("DP %s: OUI %*phD%s dev-ID %*pE HW-rev %d.%d SW-rev
> > %d.%d\n",
> > + DRM_DEBUG_KMS("DP %s: OUI %*phD%s dev-ID %*pE HW-rev %d.%d SW-rev %d.%d
> > quirks 0x%04x\n",
> > drm_dp_is_branch(intel_dp->dpcd) ? "branch" : "sink",
> > (int)sizeof(desc->oui), desc->oui, oui_sup ? "" : "(NS)",
> > dev_id_len, desc->device_id,
> > desc->hw_rev >> 4, desc->hw_rev & 0xf,
> > - desc->sw_major_rev, desc->sw_minor_rev);
> > + desc->sw_major_rev, desc->sw_minor_rev,
> > + intel_dp->quirks);
> >
> > return true;
> > }
> > @@ -1658,6 +1662,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > int link_avail, link_clock;
> > int common_len;
> > uint8_t link_bw, rate_select;
> > + bool reduce_m_n = intel_dp->quirks & DP_DPCD_QUIRK_LIMITED_M_N;
> >
> > common_len = intel_dp_common_len_rate_limit(intel_dp,
> > intel_dp->max_link_rate);
> > @@ -1790,7 +1795,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > intel_link_compute_m_n(bpp, lane_count,
> > adjusted_mode->crtc_clock,
> > pipe_config->port_clock,
> > - &pipe_config->dp_m_n);
> > + &pipe_config->dp_m_n,
> > + reduce_m_n);
> >
> > if (intel_connector->panel.downclock_mode != NULL &&
> > dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> > @@ -1798,7 +1804,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > intel_link_compute_m_n(bpp, lane_count,
> > intel_connector->panel.downclock_mode->clock,
> > pipe_config->port_clock,
> > - &pipe_config->dp_m2_n2);
> > + &pipe_config->dp_m2_n2,
> > + reduce_m_n);
> > }
> >
> > /*
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index 68c788eb0b95..763d490eeca9 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -44,6 +44,7 @@ static bool intel_dp_mst_compute_config(struct
> > intel_encoder *encoder,
> > int lane_count, slots;
> > const struct drm_display_mode *adjusted_mode =
> > &pipe_config->base.adjusted_mode;
> > int mst_pbn;
> > + bool reduce_m_n = intel_dp->quirks & DP_DPCD_QUIRK_LIMITED_M_N;
> >
> > pipe_config->has_pch_encoder = false;
> > bpp = 24;
> > @@ -79,7 +80,8 @@ static bool intel_dp_mst_compute_config(struct
> > intel_encoder *encoder,
> > intel_link_compute_m_n(bpp, lane_count,
> > adjusted_mode->crtc_clock,
> > pipe_config->port_clock,
> > - &pipe_config->dp_m_n);
> > + &pipe_config->dp_m_n,
> > + reduce_m_n);
> >
> > pipe_config->dp_m_n.tu = slots;
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index bd500977b3fc..664156acff0c 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -997,6 +997,8 @@ struct intel_dp {
> > int max_link_rate;
> > /* sink or branch descriptor */
> > struct intel_dp_desc desc;
> > + /* Quirks as returned by drm_dp_get_quirks() */
> > + u32 quirks;
> > struct drm_dp_aux aux;
> > enum intel_display_power_domain aux_power_domain;
> > uint8_t train_set[4];
>
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