From: Hans Verkuil <hans.verk...@cisco.com> The Odroid-U3 board has an IP4791CZ12 level shifter that is disabled if the HPD is low, which means that the CEC pin is disabled as well.
Signed-off-by: Hans Verkuil <hans.verk...@cisco.com> Cc: Krzysztof Kozlowski <k...@kernel.org> Cc: Andrzej Hajda <a.ha...@samsung.com> Cc: devicet...@vger.kernel.org --- arch/arm/boot/dts/exynos4412-odroidu3.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 7504a5aa538e..7209cb48fc2a 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -131,3 +131,7 @@ cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>; status = "okay"; }; + +&hdmicec { + needs-hpd; +}; -- 2.11.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel