---
 include/drm/i915_drm.h | 61 ++++++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 52 insertions(+), 9 deletions(-)

diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 5ebe046..c26bf7c 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -412,6 +412,25 @@ typedef struct drm_i915_irq_wait {
  */
 #define I915_PARAM_HAS_EXEC_FENCE       44
 
+/* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to capture
+ * user specified bufffers for post-mortem debugging of GPU hangs. See
+ * EXEC_OBJECT_CAPTURE.
+ */
+#define I915_PARAM_HAS_EXEC_CAPTURE     45
+
+#define I915_PARAM_SLICE_MASK           46
+
+/* Assuming it's uniform for each slice, this queries the mask of subslices
+ * per-slice for this system.
+ */
+#define I915_PARAM_SUBSLICE_MASK        47
+
+/*
+ * Query whether DRM_I915_GEM_EXECBUFFER2 supports supplying the batch buffer
+ * as the first execobject as opposed to the last. See I915_EXEC_BATCH_FIRST.
+ */
+#define I915_PARAM_HAS_EXEC_BATCH_FIRST         48
+
 typedef struct drm_i915_getparam {
        __s32 param;
        /*
@@ -666,6 +685,8 @@ struct drm_i915_gem_relocation_entry {
 #define I915_GEM_DOMAIN_VERTEX         0x00000020
 /** GTT domain - aperture and scanout */
 #define I915_GEM_DOMAIN_GTT            0x00000040
+/** WC domain - uncached access */
+#define I915_GEM_DOMAIN_WC             0x00000080
 /** @} */
 
 struct drm_i915_gem_exec_object {
@@ -773,8 +794,15 @@ struct drm_i915_gem_exec_object2 {
  * I915_PARAM_HAS_EXEC_FENCE to order execbufs and execute them asynchronously.
  */
 #define EXEC_OBJECT_ASYNC              (1<<6)
+/* Request that the contents of this execobject be copied into the error
+ * state upon a GPU hang involving this batch for post-mortem debugging.
+ * These buffers are recorded in no particular order as "user" in
+ * /sys/class/drm/cardN/error. Query I915_PARAM_HAS_EXEC_CAPTURE to see
+ * if the kernel supports this flag.
+ */
+#define EXEC_OBJECT_CAPTURE            (1<<7)
 /* All remaining bits are MBZ and RESERVED FOR FUTURE USE */
-#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_ASYNC<<1)
+#define __EXEC_OBJECT_UNKNOWN_FLAGS -(EXEC_OBJECT_CAPTURE<<1)
        __u64 flags;
 
        union {
@@ -889,7 +917,17 @@ struct drm_i915_gem_execbuffer2 {
  */
 #define I915_EXEC_FENCE_OUT            (1<<17)
 
-#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_OUT<<1))
+/*
+ * Traditionally the execbuf ioctl has only considered the final element in
+ * the execobject[] to be the executable batch. Often though, the client
+ * will known the batch object prior to construction and being able to place
+ * it into the execobject[] array first can simplify the relocation tracking.
+ * Setting I915_EXEC_BATCH_FIRST tells execbuf to use element 0 of the
+ * execobject[] as the * batch instead (the default is to use the last
+ * element).
+ */
+#define I915_EXEC_BATCH_FIRST          (1<<18)
+#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_BATCH_FIRST<<1))
 
 #define I915_EXEC_CONTEXT_ID_MASK      (0xffffffff)
 #define i915_execbuffer2_set_context_id(eb2, context) \
@@ -1293,13 +1331,18 @@ struct drm_i915_gem_context_param {
 };
 
 enum drm_i915_oa_format {
-       I915_OA_FORMAT_A13 = 1,
-       I915_OA_FORMAT_A29,
-       I915_OA_FORMAT_A13_B8_C8,
-       I915_OA_FORMAT_B4_C8,
-       I915_OA_FORMAT_A45_B8_C8,
-       I915_OA_FORMAT_B4_C8_A16,
-       I915_OA_FORMAT_C4_B8,
+       I915_OA_FORMAT_A13 = 1,     /* HSW only */
+       I915_OA_FORMAT_A29,         /* HSW only */
+       I915_OA_FORMAT_A13_B8_C8,   /* HSW only */
+       I915_OA_FORMAT_B4_C8,       /* HSW only */
+       I915_OA_FORMAT_A45_B8_C8,   /* HSW only */
+       I915_OA_FORMAT_B4_C8_A16,   /* HSW only */
+       I915_OA_FORMAT_C4_B8,       /* HSW+ */
+
+       /* Gen8+ */
+       I915_OA_FORMAT_A12,
+       I915_OA_FORMAT_A12_B8_C8,
+       I915_OA_FORMAT_A32u40_A4u32_B8_C8,
 
        I915_OA_FORMAT_MAX          /* non-ABI */
 };
-- 
2.5.0.400.gff86faf

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