On Mon, Feb 26, 2018 at 10:42:37PM +0530, Ramalingam C wrote:
> HDCP1.4 key can be loaded, only when Power well #1 is enabled and cdclk
> is enabled. Using the I915 power well infrastruture, above requirement
> is verified.
> 
> This patch enables the hdcp initialization for HSW, BDW, and BXT.
> 
> Signed-off-by: Ramalingam C <ramalinga...@intel.com>

Reviewed-by: Sean Paul <seanp...@chromium.org>

> ---
>  drivers/gpu/drm/i915/intel_hdcp.c | 31 +++++++++++++++++++++++++++++--
>  1 file changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdcp.c 
> b/drivers/gpu/drm/i915/intel_hdcp.c
> index 7ea55fa46f41..95081aaa832a 100644
> --- a/drivers/gpu/drm/i915/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/intel_hdcp.c
> @@ -37,6 +37,33 @@ static int intel_hdcp_poll_ksv_fifo(struct 
> intel_digital_port *intel_dig_port,
>       return 0;
>  }
>  
> +static bool hdcp_key_loadable(struct drm_i915_private *dev_priv)
> +{
> +     struct i915_power_domains *power_domains = &dev_priv->power_domains;
> +     struct i915_power_well *power_well;
> +     bool enabled = false;
> +
> +     mutex_lock(&power_domains->lock);
> +
> +     /* PG1 (power well #1) needs to be enabled */
> +     for_each_power_well(dev_priv, power_well) {
> +             if (power_well->id == SKL_DISP_PW_1) {
> +                     enabled = power_well->ops->is_enabled(dev_priv,
> +                                                           power_well);
> +                     break;
> +             }
> +     }
> +     mutex_unlock(&power_domains->lock);
> +
> +     /*
> +      * Another req for hdcp key loadability is enabled state of pll for
> +      * cdclk. Without active crtc we wont land here. So we are assuming that
> +      * cdclk is already on.
> +      */
> +
> +     return enabled;
> +}
> +
>  static void intel_hdcp_clear_keys(struct drm_i915_private *dev_priv)
>  {
>       I915_WRITE(HDCP_KEY_CONF, HDCP_CLEAR_KEYS_TRIGGER);
> @@ -598,8 +625,8 @@ static int _intel_hdcp_enable(struct intel_connector 
> *connector)
>       DRM_DEBUG_KMS("[%s:%d] HDCP is being enabled...\n",
>                     connector->base.name, connector->base.base.id);
>  
> -     if (!(I915_READ(SKL_FUSE_STATUS) & SKL_FUSE_PG_DIST_STATUS(1))) {
> -             DRM_ERROR("PG1 is disabled, cannot load keys\n");
> +     if (!hdcp_key_loadable(dev_priv)) {
> +             DRM_ERROR("HDCP key Load is not possible\n");
>               return -ENXIO;
>       }
>  
> -- 
> 2.7.4
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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