From: zain wang <w...@rock-chips.com>

There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
list.  We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
instead of ANALOGIX_DP_PLL_CTL.

Cc: Douglas Anderson <diand...@chromium.org>
Signed-off-by: zain wang <w...@rock-chips.com>
Signed-off-by: Sean Paul <seanp...@chromium.org>
Signed-off-by: Thierry Escande <thierry.esca...@collabora.com>
Reviewed-by: Andrzej Hajda <a.ha...@samsung.com>
Signed-off-by: Enric Balletbo i Serra <enric.balle...@collabora.com>
Tested-by: Marek Szyprowski <m.szyprow...@samsung.com>
---

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 7b7fd227e1f9..02ab1aaa9993 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -230,16 +230,20 @@ enum pll_status analogix_dp_get_pll_lock_status(struct 
analogix_dp_device *dp)
 void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
 {
        u32 reg;
+       u32 mask = DP_PLL_PD;
+       u32 pd_addr = ANALOGIX_DP_PLL_CTL;
 
-       if (enable) {
-               reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
-               reg |= DP_PLL_PD;
-               writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
-       } else {
-               reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
-               reg &= ~DP_PLL_PD;
-               writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+       if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+               pd_addr = ANALOGIX_DP_PD;
+               mask = RK_PLL_PD;
        }
+
+       reg = readl(dp->reg_base + pd_addr);
+       if (enable)
+               reg |= mask;
+       else
+               reg &= ~mask;
+       writel(reg, dp->reg_base + pd_addr);
 }
 
 void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
-- 
2.16.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Reply via email to