On Wed, 2018-04-11 at 17:31 +0200, Lucas Stach wrote:
> The LVDS signal integrity is only guaranteed when the correct enable
> sequence (first IPU DI, then LDB) is used. If the LDB display output was
> active before the imx-drm driver is loaded (like when a bootsplash was
> active) the DI will be disabled by the full IPU reset we do when loading
> the driver. The LDB control registers are not part of the IPU range and
> thus will remain unchanged.
> This leads to the LDB still being active when the DI is getting enabled,
> effectively reversing the required enable sequence. Fix this by also
> disabling the LDB on driver bind.
> Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
> drivers/gpu/drm/imx/imx-ldb.c | 3 +++
> 1 file changed, 3 insertions(+)
> diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
> index 56dd7a9a8e25..17974c0b4be8 100644
> --- a/drivers/gpu/drm/imx/imx-ldb.c
> +++ b/drivers/gpu/drm/imx/imx-ldb.c
> @@ -612,6 +612,9 @@ static int imx_ldb_bind(struct device *dev, struct device
> *master, void *data)
> return PTR_ERR(imx_ldb->regmap);
> + /* disable LDB by resetting the control register to POR default */
> + regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
On second thought, this is nice and clear. Moving it into encoder .reset
would unnecessarily complicate things, as both channels share this
register and .reset is called twice, once per channel.
I've applied both patches to imx-drm/next.
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