From: Thierry Reding <tred...@nvidia.com>

The IOVA API uses a memory cache to allocate IOVA nodes from. To make
sure that this cache is available, obtain a reference to it and release
the reference when the cache is no longer needed.

On 64-bit ARM this is hidden by the fact that the DMA mapping API gets
that reference and never releases it. On 32-bit ARM, however, the DMA
mapping API doesn't do that, so allocation of IOVA nodes fails.

Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
 drivers/gpu/drm/tegra/drm.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 4a696fa274a3..0540b0741df6 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -115,6 +115,10 @@ static int tegra_drm_load(struct drm_device *drm, unsigned 
long flags)
                        goto free;
                }
 
+               err = iova_cache_get();
+               if (err < 0)
+                       goto domain;
+
                geometry = &tegra->domain->geometry;
                gem_start = geometry->aperture_start;
                gem_end = geometry->aperture_end - CARVEOUT_SZ;
@@ -205,11 +209,12 @@ static int tegra_drm_load(struct drm_device *drm, 
unsigned long flags)
        tegra_drm_fb_free(drm);
 config:
        drm_mode_config_cleanup(drm);
-
+domain:
        if (tegra->domain) {
                mutex_destroy(&tegra->mm_lock);
                drm_mm_takedown(&tegra->mm);
                put_iova_domain(&tegra->carveout.domain);
+               iova_cache_put();
                iommu_domain_free(tegra->domain);
        }
 free:
@@ -236,6 +241,7 @@ static void tegra_drm_unload(struct drm_device *drm)
                mutex_destroy(&tegra->mm_lock);
                drm_mm_takedown(&tegra->mm);
                put_iova_domain(&tegra->carveout.domain);
+               iova_cache_put();
                iommu_domain_free(tegra->domain);
        }
 
-- 
2.17.0

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