On Tue, Sep 04, 2018 at 12:40:49PM +0800, Icenowy Zheng wrote: > From: Jagan Teki <ja...@amarulasolutions.com> > > Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent. > > Include the macro on dt-bindings so-that the same can be used > while defining CCU clock phandles. > > Signed-off-by: Jagan Teki <ja...@amarulasolutions.com> > Reviewed-by: Rob Herring <r...@kernel.org> > Signed-off-by: Icenowy Zheng <icen...@aosc.io>
Applied, thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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