Currently we fail to encode any of these fields correctly if they are large enough to require the top 2 bits. Thankfully none of the EDID sources here are affected.
The masking and shifting of the top 2 bits (out of 10 for X, 6 for Y) is only needed in one place so remove the msbs4() macro. Signed-off-by: Ben Hutchings <[email protected]> --- Documentation/EDID/edid.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/Documentation/EDID/edid.S b/Documentation/EDID/edid.S index ce4b8b4a20b2..8abbf6c24d88 100644 --- a/Documentation/EDID/edid.S +++ b/Documentation/EDID/edid.S @@ -48,8 +48,6 @@ ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f)) #define swap16(v1) ((v1>>8)+((v1&0xff)<<8)) #define msbs2(v1,v2) ((((v1>>8)&0x0f)<<4)+((v2>>8)&0x0f)) -#define msbs4(v1,v2,v3,v4) \ - (((v1&0x03)>>2)+((v2&0x03)>>4)+((v3&0x03)>>6)+((v4&0x03)>>8)) #define pixdpi2mm(pix,dpi) ((pix*25)/dpi) #define xsize pixdpi2mm(XPIX,DPI) #define ysize pixdpi2mm(YPIX,DPI) @@ -202,12 +200,12 @@ x_snc_off_lsb: .byte XOFFSET&0xff x_snc_pls_lsb: .byte XPULSE&0xff /* Bits 7-4 Vertical sync offset lines 4 lsbits (0-63) Bits 3-0 Vertical sync pulse width lines 4 lsbits (0-63) */ -y_snc_lsb: .byte (YOFFSET<<4)+YPULSE +y_snc_lsb: .byte ((YOFFSET&0x0f)<<4)+(YPULSE&0x0f) /* Bits 7-6 Horizontal sync offset pixels 2 msbits Bits 5-4 Horizontal sync pulse width pixels 2 msbits Bits 3-2 Vertical sync offset lines 2 msbits Bits 1-0 Vertical sync pulse width lines 2 msbits */ -xy_snc_msbs: .byte msbs4(XOFFSET,XPULSE,YOFFSET,YPULSE) +xy_snc_msbs: .byte (((XOFFSET>>8)&3)<<6)+(((XPULSE>>8)&3)<<4)+(((YOFFSET>>4)&3)<<2)+((YPULSE>>4)&3) /* Horizontal display size, mm, 8 lsbits (0-4095 mm, 161 in) */ x_dsp_size: .byte xsize&0xff -- Ben Hutchings, Software Developer Codethink Ltd https://www.codethink.co.uk/ Dale House, 35 Dale Street Manchester, M1 2HF, United Kingdom _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
