[PATCH 03/15] clk: rockchip: use clock ids for dphy rx and tx on rk3368

[Heiko Stuebner]

Export the clocks using the newly added clock ids.

Signed-off-by: Heiko Stuebner <he...@sntech.de>
---
 drivers/clk/rockchip/clk-rk3368.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3368.c 
b/drivers/clk/rockchip/clk-rk3368.c
index 7c4d242f19c1..58debf7daf85 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -823,8 +823,8 @@ static struct rockchip_clk_branch rk3368_clk_branches[] 
__initdata = {
         * pclk_vio gates
         * pclk_vio comes from the exactly same source as hclk_vio
         */
-       GATE(0, "pclk_dphyrx", "hclk_vio", CLK_IGNORE_UNUSED, 
RK3368_CLKGATE_CON(14), 8, GFLAGS),
-       GATE(0, "pclk_dphytx", "hclk_vio", CLK_IGNORE_UNUSED, 
RK3368_CLKGATE_CON(14), 8, GFLAGS),
+       GATE(PCLK_DPHYRX, "pclk_dphyrx", "hclk_vio", CLK_IGNORE_UNUSED, 
RK3368_CLKGATE_CON(14), 8, GFLAGS),
+       GATE(PCLK_DPHYTX, "pclk_dphytx", "hclk_vio", CLK_IGNORE_UNUSED, 
RK3368_CLKGATE_CON(14), 8, GFLAGS),
 
        /* pclk_pd_pmu gates */
        GATE(PCLK_PMUGRF, "pclk_pmugrf", "pclk_pd_pmu", CLK_IGNORE_UNUSED, 
RK3368_CLKGATE_CON(23), 5, GFLAGS),
-- 
2.19.2

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