Quoting wangyan wang (2019-02-19 18:53:54) > From: chunhui dai <chunhui....@mediatek.com> > > Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.
s/falgs/flags/ > Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST". > > Signed-off-by: chunhui dai <chunhui....@mediatek.com> > Signed-off-by: wangyan wang <wangyan.w...@mediatek.com> > --- > drivers/clk/mediatek/clk-mtk.c | 2 +- > drivers/clk/mediatek/clk-mtk.h | 20 ++++++++++++++------ > 2 files changed, 15 insertions(+), 7 deletions(-) > > diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c > index 9c0ae4278a94..2ed996404804 100644 > --- a/drivers/clk/mediatek/clk-mtk.c > +++ b/drivers/clk/mediatek/clk-mtk.c > @@ -167,7 +167,7 @@ struct clk *mtk_clk_register_composite(const struct > mtk_composite *mc, > mux->mask = BIT(mc->mux_width) - 1; > mux->shift = mc->mux_shift; > mux->lock = lock; > - > + mux->flags = mc->mux_flags; > mux_hw = &mux->hw; > mux_ops = &clk_mux_ops; > > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index f83c2bbb677e..4b88d196d52f 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -81,15 +81,13 @@ struct mtk_composite { > signed char divider_shift; > signed char divider_width; > > + unsigned char mux_flags; Why isn't it an unsigned long? Isn't this supposed to match the frameworks version of the clk flags? _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel