On Tue, 21 May 2019, Gwan-gyeong Mun <gwan-gyeong....@intel.com> wrote: > On Gen 11 platform, to enable resolutions like 5K@120 (or higher) we need > to use DSC (DP 1.4) or YCbCr4:2:0 (DP 1.3 or 1.4) on DP. > In order to support YCbCr4:2:0 on DP we need to program YCBCR 4:2:0 > to MSA and VSC SDP. > And Link M/N values are calculated and applied based on the Full Clock > forYCbCr420. > The Bit per Pixel needs to be adjusted for YUV420 mode as it requires only > half of the RGB case. > - Link M/N values are calculated and applied based on the Full Clock > - Data M/N values needs to be calculated considering the data is half > due to subsampling > > These patches add a VSC structure for handling Pixel Encoding/Colorimetry > Formats and program YCBCR 4:2:0 to MSA and VSC SDP. And it changes a link > bandwidth computation for DP.
Thanks for the patches, pushed to dinq with Laurent's and Maarten's acks to queue patch 2 via drm-intel. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
