Enable and connect the second LVDS encoder to the second LVDS input of
the THC63LVD1024 for dual-link LVDS operation. This requires changing
the default settings of SW45 and SW47 to OFF and ON respectively.

Signed-off-by: Laurent Pinchart <laurent.pinchart+rene...@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+rene...@jmondi.org>
---
 .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 24 +++++++++++++------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts 
b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index c72772589953..988d82609f41 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -93,11 +93,18 @@
 
                        port@0 {
                                reg = <0>;
-                               thc63lvd1024_in: endpoint {
+                               thc63lvd1024_in0: endpoint {
                                        remote-endpoint = <&lvds0_out>;
                                };
                        };
 
+                       port@1 {
+                               reg = <1>;
+                               thc63lvd1024_in1: endpoint {
+                                       remote-endpoint = <&lvds1_out>;
+                               };
+                       };
+
                        port@2 {
                                reg = <2>;
                                thc63lvd1024_out: endpoint {
@@ -482,24 +489,27 @@
        ports {
                port@1 {
                        lvds0_out: endpoint {
-                               remote-endpoint = <&thc63lvd1024_in>;
+                               remote-endpoint = <&thc63lvd1024_in0>;
                        };
                };
        };
 };
 
 &lvds1 {
-       /*
-        * Even though the LVDS1 output is not connected, the encoder must be
-        * enabled to supply a pixel clock to the DU for the DPAD output when
-        * LVDS0 is in use.
-        */
        status = "okay";
 
        clocks = <&cpg CPG_MOD 727>,
                 <&x13_clk>,
                 <&extal_clk>;
        clock-names = "fck", "dclkin.0", "extal";
+
+       ports {
+               port@1 {
+                       lvds1_out: endpoint {
+                               remote-endpoint = <&thc63lvd1024_in1>;
+                       };
+               };
+       };
 };
 
 &ohci0 {
-- 
Regards,

Laurent Pinchart

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