On Mon, 2019-09-02 at 17:43 +0300, Ville Syrjälä wrote:
> On Fri, Aug 23, 2019 at 12:52:28PM +0300, Gwan-gyeong Mun wrote:
> > When BT.2020 Colorimetry output is used for DP, we should program
> > BT.2020
> > Colorimetry to MSA and VSC SDP. It adds output_colorspace to
> > intel_crtc_state struct as a place holder of pipe's output
> > colorspace.
> > In order to distinguish needed colorimetry for VSC SDP, it adds
> > intel_dp_needs_vsc_colorimetry function.
> > If the output colorspace requires vsc sdp or output format is YCbCr
> > 4:2:0,
> > it uses MSA with VSC SDP.
> >
> > As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication of
> > Color Encoding Format and Content Color Gamut] while sending
> > BT.2020 Colorimetry signals we should program MSA MISC1 fields
> > which
> > indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> >
> > v2: Remove useless parentheses
> >
> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong....@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 8 +++---
> > .../drm/i915/display/intel_display_types.h | 3 +++
> > drivers/gpu/drm/i915/display/intel_dp.c | 25
> > ++++++++++++++++++-
> > drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> > 4 files changed, 33 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 4f7ea0a35976..5c42b58c1c2f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1737,11 +1737,13 @@ void intel_ddi_set_pipe_settings(const
> > struct intel_crtc_state *crtc_state)
> > /*
> > * As per DP 1.4a spec section 2.2.4.3 [MSA Field for
> > Indication
> > * of Color Encoding Format and Content Color Gamut] while
> > sending
> > - * YCBCR 420 signals we should program MSA MISC1 fields which
> > - * indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> > + * YCBCR 420, HDR BT.2020 signals we should program MSA MISC1
> > fields
> > + * which indicate VSC SDP for the Pixel Encoding/Colorimetry
> > Format.
> > */
> > - if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> > + if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420
> > ||
> > + intel_dp_needs_vsc_colorimetry(crtc_state-
> > >output_colorspace))
> > temp |= TRANS_MSA_USE_VSC_SDP;
> > +
> > I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 449abaea619f..9845abcf6f29 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -964,6 +964,9 @@ struct intel_crtc_state {
> > /* Output format RGB/YCBCR etc */
> > enum intel_output_format output_format;
> >
> > + /* Output colorspace sRGB/BT.2020 etc */
> > + u32 output_colorspace;
> > +
> > /* Output down scaling is done in LSPCON device */
> > bool lspcon_downsampling;
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 55d5ab97061c..295d5ed2be96 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2164,6 +2164,8 @@ intel_dp_compute_config(struct intel_encoder
> > *encoder,
> > pipe_config->has_pch_encoder = true;
> >
> > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > + pipe_config->output_colorspace = intel_conn_state-
> > >base.colorspace;
> > +
> > if (lspcon->active)
> > lspcon_ycbcr420_config(&intel_connector->base,
> > pipe_config);
> > else
> > @@ -4408,6 +4410,26 @@ u8 intel_dp_dsc_get_slice_count(struct
> > intel_dp *intel_dp,
> > return 0;
> > }
> >
> > +bool
> > +intel_dp_needs_vsc_colorimetry(u32 colorspace)
>
> I would pass the entire crtc state here so you handle handle the
> 4:2:0
> case here as well.
>
Okay, I'll pass the entire intel_crtc_state stucture value to
intel_dp_needs_vsc_colorimetry() for checking output format (YCbCr
4:2:0) and output colorspace here. And I'll change the fuction name to
intel_dp_needs_vsc_sdp().
> > +{
> > + bool ret = false;
>
> Pointless variable.
>
I'll remove pointless variables.
> > +
> > + switch (colorspace) {
> > + case DRM_MODE_COLORIMETRY_SYCC_601:
> > + case DRM_MODE_COLORIMETRY_OPYCC_601:
> > + case DRM_MODE_COLORIMETRY_BT2020_YCC:
> > + case DRM_MODE_COLORIMETRY_BT2020_RGB:
> > + case DRM_MODE_COLORIMETRY_BT2020_CYCC:
> > + ret = true;
> > + break;
> > + default:
> > + break;
> > + }
> > +
> > + return ret;
> > +}
> > +
> > static void
> > intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *crtc_state,
> > @@ -4536,7 +4558,8 @@ void intel_dp_vsc_enable(struct intel_dp
> > *intel_dp,
> > const struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state)
> > {
> > - if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> > + if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420
> > &&
> > + !intel_dp_needs_vsc_colorimetry(conn_state->colorspace))
> > return;
> >
> > intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> > b/drivers/gpu/drm/i915/display/intel_dp.h
> > index 91a0ee6058fe..b2da7c9998f7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -111,6 +111,7 @@ bool intel_dp_read_dpcd(struct intel_dp
> > *intel_dp);
> > bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
> > int intel_dp_link_required(int pixel_clock, int bpp);
> > int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
> > +bool intel_dp_needs_vsc_colorimetry(u32 colorspace);
> > void intel_dp_vsc_enable(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state *conn_state);
> > --
> > 2.22.0
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > intel-...@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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