Reviewed-by: Lyude Paul <ly...@redhat.com>
On Tue, 2019-10-15 at 16:35 +0200, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
>
> If the transmitter supports pre-emphasis post cursor2 the sink will
> request adjustments in a similar way to how it requests adjustments to
> the voltage swing and pre-emphasis settings.
>
> Add a helper to extract these adjustments on a per-lane basis from the
> DPCD link status.
>
> Reviewed-by: Philipp Zabel <p.za...@pengutronix.de>
> Signed-off-by: Thierry Reding <tred...@nvidia.com>
> ---
> drivers/gpu/drm/drm_dp_helper.c | 10 ++++++++++
> include/drm/drm_dp_helper.h | 10 ++++++++++
> 2 files changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_dp_helper.c
> b/drivers/gpu/drm/drm_dp_helper.c
> index 4b66010771fa..de8ff8ddb445 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -120,6 +120,16 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8
> link_status[DP_LINK_STATUS_SI
> }
> EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
>
> +u8 drm_dp_get_adjust_request_post_cursor(const u8
> link_status[DP_LINK_STATUS_SIZE],
> + unsigned int lane)
> +{
> + unsigned int offset = DP_ADJUST_REQUEST_POST_CURSOR2;
> + u8 value = dp_link_status(link_status, offset);
> +
> + return (value >> (lane << 1)) & 0x3;
> +}
> +EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
> +
> void drm_dp_link_train_clock_recovery_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE])
> {
> unsigned int rd_interval = drm_dp_aux_rd_interval(dpcd);
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 6c12de6f7e46..e0b2c03f3cbb 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -608,6 +608,14 @@
> # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
>
> #define DP_ADJUST_REQUEST_POST_CURSOR2 0x20c
> +# define DP_ADJUST_POST_CURSOR2_LANE0_MASK 0x03
> +# define DP_ADJUST_POST_CURSOR2_LANE0_SHIFT 0
> +# define DP_ADJUST_POST_CURSOR2_LANE1_MASK 0x0c
> +# define DP_ADJUST_POST_CURSOR2_LANE1_SHIFT 2
> +# define DP_ADJUST_POST_CURSOR2_LANE2_MASK 0x30
> +# define DP_ADJUST_POST_CURSOR2_LANE2_SHIFT 4
> +# define DP_ADJUST_POST_CURSOR2_LANE3_MASK 0xc0
> +# define DP_ADJUST_POST_CURSOR2_LANE3_SHIFT 6
>
> #define DP_TEST_REQUEST 0x218
> # define DP_TEST_LINK_TRAINING (1 << 0)
> @@ -1121,6 +1129,8 @@ u8 drm_dp_get_adjust_request_voltage(const u8
> link_status[DP_LINK_STATUS_SIZE],
> int lane);
> u8 drm_dp_get_adjust_request_pre_emphasis(const u8
> link_status[DP_LINK_STATUS_SIZE],
> int lane);
> +u8 drm_dp_get_adjust_request_post_cursor(const u8
> link_status[DP_LINK_STATUS_SIZE],
> + unsigned int lane);
>
> #define DP_BRANCH_OUI_HEADER_SIZE 0xc
> #define DP_RECEIVER_CAP_SIZE 0xf
--
Cheers,
Lyude Paul
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