This patch does the following:
- Creates the CRTC property for scaling filter mode (for GEN11 and +).
- Applies the chosen filter value while enabling the panel fitter.
- Adds CRTC state readouts and comparisons.

Signed-off-by: Shashank Sharma <shashank.sha...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 59 +++++++++++++++++++-
 1 file changed, 58 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 1a533ccdb54f..21993f9fd2ae 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5615,11 +5615,35 @@ static void skylake_scaler_disable(struct intel_crtc 
*crtc)
                skl_detach_scaler(crtc, i);
 }
 
+static u32
+icelake_get_scaler_filter(const struct intel_crtc_state *crtc_state)
+{
+       const struct drm_crtc_state *state = &crtc_state->base;
+
+       switch (state->scaling_filter) {
+       case DRM_SCALING_FILTER_BILINEAR:
+               return PS_FILTER_BILINEAR;
+       case DRM_SCALING_FILTER_EDGE_ENHANCE:
+               return PS_FILTER_EDGE_ENHANCE;
+       case DRM_SCALING_FILTER_NN:
+       case DRM_SCALING_FILTER_NN_IS_ONLY:
+               return PS_FILTER_PROGRAMMED;
+       case DRM_SCALING_FILTER_INVALID:
+               DRM_ERROR("Ignoring invalid scaler filter mode\n");
+               return PS_FILTER_MEDIUM;
+       case DRM_SCALING_FILTER_DEFAULT:
+       case DRM_SCALING_FILTER_MEDIUM:
+       default:
+               return PS_FILTER_MEDIUM;
+       }
+}
+
 static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
 {
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        enum pipe pipe = crtc->pipe;
+       u32 scaler_filter;
        const struct intel_crtc_scaler_state *scaler_state =
                &crtc_state->scaler_state;
 
@@ -5640,9 +5664,11 @@ static void skylake_pfit_enable(const struct 
intel_crtc_state *crtc_state)
                uv_rgb_hphase = skl_scaler_calc_phase(1, hscale, false);
                uv_rgb_vphase = skl_scaler_calc_phase(1, vscale, false);
 
+               scaler_filter = icelake_get_scaler_filter(crtc_state);
+
                id = scaler_state->scaler_id;
                I915_WRITE(SKL_PS_CTRL(pipe, id), PS_SCALER_EN |
-                       PS_FILTER_MEDIUM | scaler_state->scalers[id].mode);
+                       scaler_filter | scaler_state->scalers[id].mode);
                I915_WRITE_FW(SKL_PS_VPHASE(pipe, id),
                              PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
                I915_WRITE_FW(SKL_PS_HPHASE(pipe, id),
@@ -12192,6 +12218,10 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
                              pipe_config->scaler_state.scaler_users,
                              pipe_config->scaler_state.scaler_id);
 
+       if (INTEL_GEN(dev_priv) >= 11)
+               DRM_DEBUG_KMS("scaling_filter: %d\n",
+                             pipe_config->base.scaling_filter);
+
        if (HAS_GMCH(dev_priv))
                DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds 
border: 0x%08x\n",
                              pipe_config->gmch_pfit.control,
@@ -12858,6 +12888,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
                }
 
                PIPE_CONF_CHECK_I(scaler_state.scaler_id);
+               PIPE_CONF_CHECK_I(base.scaling_filter);
                PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
 
                PIPE_CONF_CHECK_X(gamma_mode);
@@ -14996,6 +15027,29 @@ intel_cursor_plane_create(struct drm_i915_private 
*dev_priv,
        return ERR_PTR(ret);
 }
 
+static void icl_create_scaler_filter_property(struct intel_crtc *crtc,
+                                   struct intel_crtc_state *crtc_state)
+{
+       struct drm_property *prop;
+       struct drm_device *dev = crtc->base.dev;
+       struct drm_mode_config *mode_config = &dev->mode_config;
+       u8 size;
+
+       if (mode_config->scaling_filter_property)
+               return;
+
+       size = ARRAY_SIZE(drm_scaling_filter_enum_list);
+       prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE,
+                                       "SCALING_FILTERS",
+                                       drm_scaling_filter_enum_list, size);
+       if (!prop) {
+               DRM_ERROR("Failed to create scaling filter property\n");
+               return;
+       }
+
+       dev->mode_config.scaling_filter_property = prop;
+}
+
 static void intel_crtc_init_scalers(struct intel_crtc *crtc,
                                    struct intel_crtc_state *crtc_state)
 {
@@ -15016,6 +15070,9 @@ static void intel_crtc_init_scalers(struct intel_crtc 
*crtc,
        }
 
        scaler_state->scaler_id = -1;
+
+       if (INTEL_GEN(dev_priv) >= 11)
+               icl_create_scaler_filter_property(crtc, crtc_state);
 }
 
 #define INTEL_CRTC_FUNCS \
-- 
2.17.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Reply via email to