Hi Chris, Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next linus/master next-20200203] [cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next v5.5] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-Remove-PageReserved-manipulation-from-drm_pci_alloc/20200203-201707 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-s2-20200204 (attached as .config) compiler: gcc-4.9 (Debian 4.9.2-10+deb8u1) 4.9.2 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 If you fix the issue, kindly add following tag Reported-by: kbuild test robot <l...@intel.com> All error/warnings (new ones prefixed by >>): drivers/gpu/drm/r128/ati_pcigart.c: In function 'drm_ati_alloc_pcigart_table': >> drivers/gpu/drm/r128/ati_pcigart.c:50:7: error: expected expression before >> '^' token ^gart_info->bus_addr, ^ >> drivers/gpu/drm/r128/ati_pcigart.c:48:3: error: too few arguments to >> function 'dma_alloc_coherent' dma_alloc_coherent(&dev->pdev->dev, ^ In file included from include/linux/pci-dma-compat.h:8:0, from include/linux/pci.h:2371, from include/drm/drm_pci.h:35, from drivers/gpu/drm/r128/ati_pcigart.c:37: include/linux/dma-mapping.h:641:21: note: declared here static inline void *dma_alloc_coherent(struct device *dev, size_t size, ^ drivers/gpu/drm/r128/ati_pcigart.c: At top level: >> drivers/gpu/drm/r128/ati_pcigart.c:101:2: error: expected identifier or '(' >> before 'return' return 1; ^ >> drivers/gpu/drm/r128/ati_pcigart.c:102:1: error: expected identifier or '(' >> before '}' token } ^ drivers/gpu/drm/r128/ati_pcigart.c: In function 'drm_ati_pcigart_init': >> drivers/gpu/drm/r128/ati_pcigart.c:168:13: warning: assignment makes pointer >> from integer without a cast page_base = (u32) entry->busaddr[i]; ^ >> drivers/gpu/drm/r128/ati_pcigart.c:176:21: error: invalid operands to binary >> | (have 'u32 *' and 'int') val = page_base | 0xc; ^ drivers/gpu/drm/r128/ati_pcigart.c:179:22: error: invalid operands to binary >> (have 'u32 *' and 'int') val = (page_base >> 8) | 0xc; ^ >> drivers/gpu/drm/r128/ati_pcigart.c:183:9: warning: assignment makes integer >> from pointer without a cast val = page_base; ^ >> drivers/gpu/drm/r128/ati_pcigart.c:188:12: warning: dereferencing 'void *' >> pointer address[gart_idx] = cpu_to_le32(val); ^ >> drivers/gpu/drm/r128/ati_pcigart.c:188:5: error: invalid use of void >> expression address[gart_idx] = cpu_to_le32(val); ^ drivers/gpu/drm/r128/ati_pcigart.c: In function 'drm_ati_pcigart_cleanup': >> drivers/gpu/drm/r128/ati_pcigart.c:99:2: warning: control reaches end of >> non-void function [-Wreturn-type] } ^ vim +50 drivers/gpu/drm/r128/ati_pcigart.c 43 44 static int drm_ati_alloc_pcigart_table(struct drm_device *dev, 45 struct drm_ati_pcigart_info *gart_info) 46 { 47 gart_info->addr = > 48 dma_alloc_coherent(&dev->pdev->dev, 49 gart_info->table_size, > 50 ^gart_info->bus_addr, 51 GFP_KERNEL); 52 if (!gart_info->addr) 53 return -ENOMEM; 54 55 return 0; 56 } 57 58 static void drm_ati_free_pcigart_table(struct drm_device *dev, 59 struct drm_ati_pcigart_info *gart_info) 60 { 61 dma_free_coherent(&dev->pdev->dev, 62 gart_info->table_size, 63 gart_info->addr, 64 gart_info->bus_addr); 65 } 66 67 int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 68 { 69 struct drm_sg_mem *entry = dev->sg; 70 unsigned long pages; 71 int i; 72 int max_pages; 73 74 /* we need to support large memory configurations */ 75 if (!entry) { 76 DRM_ERROR("no scatter/gather memory!\n"); 77 return 0; 78 } 79 80 if (gart_info->bus_addr) { 81 82 max_pages = (gart_info->table_size / sizeof(u32)); 83 pages = (entry->pages <= max_pages) 84 ? entry->pages : max_pages; 85 86 for (i = 0; i < pages; i++) { 87 if (!entry->busaddr[i]) 88 break; 89 pci_unmap_page(dev->pdev, entry->busaddr[i], 90 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 91 } 92 93 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) 94 gart_info->bus_addr = 0; 95 } 96 97 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) 98 drm_ati_free_pcigart_table(dev, gart_info); > 99 } 100 > 101 return 1; > 102 } 103 104 int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 105 { 106 struct drm_local_map *map = &gart_info->mapping; 107 struct drm_sg_mem *entry = dev->sg; 108 void *address = NULL; 109 unsigned long pages; 110 u32 *page_base, gart_idx; 111 dma_addr_t bus_address = 0; 112 int i, j, ret = -ENOMEM; 113 int max_ati_pages, max_real_pages; 114 115 if (!entry) { 116 DRM_ERROR("no scatter/gather memory!\n"); 117 goto done; 118 } 119 120 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 121 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); 122 123 if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) { 124 DRM_ERROR("fail to set dma mask to 0x%Lx\n", 125 (unsigned long long)gart_info->table_mask); 126 ret = -EFAULT; 127 goto done; 128 } 129 130 ret = drm_ati_alloc_pcigart_table(dev, gart_info); 131 if (ret) { 132 DRM_ERROR("cannot allocate PCI GART page!\n"); 133 goto done; 134 } 135 } else { 136 DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n", 137 (unsigned long long)bus_address, 138 (unsigned long)address); 139 } 140 141 address = gart_info->addr; 142 bus_address = gart_info->bus_addr; 143 144 max_ati_pages = (gart_info->table_size / sizeof(u32)); 145 max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); 146 pages = (entry->pages <= max_real_pages) 147 ? entry->pages : max_real_pages; 148 149 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 150 memset(address, 0, max_ati_pages * sizeof(u32)); 151 } else { 152 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32)); 153 } 154 155 gart_idx = 0; 156 for (i = 0; i < pages; i++) { 157 /* we need to support large memory configurations */ 158 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i], 159 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 160 if (pci_dma_mapping_error(dev->pdev, entry->busaddr[i])) { 161 DRM_ERROR("unable to map PCIGART pages!\n"); 162 drm_ati_pcigart_cleanup(dev, gart_info); 163 address = NULL; 164 bus_address = 0; 165 ret = -ENOMEM; 166 goto done; 167 } > 168 page_base = (u32) entry->busaddr[i]; 169 170 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { 171 u32 offset; 172 u32 val; 173 174 switch(gart_info->gart_reg_if) { 175 case DRM_ATI_GART_IGP: > 176 val = page_base | 0xc; 177 break; 178 case DRM_ATI_GART_PCIE: 179 val = (page_base >> 8) | 0xc; 180 break; 181 default: 182 case DRM_ATI_GART_PCI: > 183 val = page_base; 184 break; 185 } 186 if (gart_info->gart_table_location == 187 DRM_ATI_GART_MAIN) { > 188 address[gart_idx] = cpu_to_le32(val); 189 } else { 190 offset = gart_idx * sizeof(u32); 191 writel(val, (void __iomem *)map->handle + offset); 192 } 193 gart_idx++; 194 page_base += ATI_PCIGART_PAGE_SIZE; 195 } 196 } 197 ret = 0; 198 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org Intel Corporation
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