>-----Original Message----- >From: Jonathan Marek <[email protected]> >Sent: Tuesday, April 21, 2020 7:41 PM >To: [email protected] >Cc: Rob Clark <[email protected]>; Sean Paul <[email protected]>; David >Airlie <[email protected]>; Daniel Vetter <[email protected]>; Jordan Crouse ><[email protected]>; Sharat Masetty <[email protected]>; >Ruhl, Michael J <[email protected]>; open list:DRM DRIVER FOR MSM >ADRENO GPU <[email protected]>; open list:DRM DRIVER FOR >MSM ADRENO GPU <[email protected]>; open list <linux- >[email protected]> >Subject: [PATCH v2 6/9] drm/msm/a6xx: A640/A650 GMU firmware path > >Newer GPUs have different GMU firmware path. > >Signed-off-by: Jonathan Marek <[email protected]> >--- > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 135 +++++++++++++++++++- >-- > drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 11 ++ > drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 6 + > 3 files changed, 136 insertions(+), 16 deletions(-) > >diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >index b22a69e2f4b0..4aef5fe985d6 100644 >--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >@@ -571,6 +571,8 @@ static void a6xx_gmu_power_config(struct a6xx_gmu >*gmu) > { > /* Disable GMU WB/RB buffer */ > gmu_write(gmu, REG_A6XX_GMU_SYS_BUS_CONFIG, 0x1); >+ gmu_write(gmu, REG_A6XX_GMU_ICACHE_CONFIG, 0x1); >+ gmu_write(gmu, REG_A6XX_GMU_DCACHE_CONFIG, 0x1); > > gmu_write(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, >0x9c40400); > >@@ -600,14 +602,91 @@ static void a6xx_gmu_power_config(struct >a6xx_gmu *gmu) > A6XX_GMU_RPMH_CTRL_GFX_VOTE_ENABLE); > } > >+static int in_range(u32 addr, u32 start, u32 size) >+{ >+ return addr >= start && addr < start + size; >+}
Minor nit: should this return a bool? M _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
