On Wed, Aug 12, 2020 at 07:36:54PM +0300, Laurent Pinchart wrote:
> Hi Prabhakar,
>
> Thank you for the patch.
>
> On Wed, Aug 12, 2020 at 03:02:17PM +0100, Lad Prabhakar wrote:
> > Setup up the required clocks for the DU to be functional.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
> > ---
> > arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> > b/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> > index cdbe527e9340..12f9242e263b 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a774e1-hihope-rzg2h.dts
> > @@ -24,3 +24,14 @@
> > reg = <0x5 0x00000000 0x0 0x80000000>;
> > };
> > };
> > +
> > +&du {
> > + clocks = <&cpg CPG_MOD 724>,
> > + <&cpg CPG_MOD 723>,
> > + <&cpg CPG_MOD 721>,
> > + <&versaclock5 1>,
> > + <&x302_clk>,
> > + <&versaclock5 2>;
> > + clock-names = "du.0", "du.1", "du.3",
> > + "dclkin.0", "dclkin.1", "dclkin.3";
>
> I have no reason to doubt this is correct, but I also can't assess that
> as I don't have access to the schematics.
>
> Acked-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Upgrading to
Reviewed-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
:-)
>
> > +};
--
Regards,
Laurent Pinchart
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