Hi Maxime Thanks for the patch.
On Fri, 18 Sep 2020 at 15:59, Maxime Ripard <max...@cerno.tech> wrote: > > The HVS has three FIFOs that can be assigned to a number of PixelValves > through a mux. > > However, changing that FIFO requires that we disable and then enable the > pixelvalve, so we want to assign FIFOs to all the enabled CRTCs, and not > just the active ones. > > Fixes: 87ebcd42fb7b ("drm/vc4: crtc: Assign output to channel automatically") > Signed-off-by: Maxime Ripard <max...@cerno.tech> Tested-by: Dave Stevenson <dave.steven...@raspberrypi.com> Reviewed-by: Dave Stevenson <dave.steven...@raspberrypi.com> > --- > drivers/gpu/drm/vc4/vc4_kms.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c > index af3ee3dcdab6..01fa60844695 100644 > --- a/drivers/gpu/drm/vc4/vc4_kms.c > +++ b/drivers/gpu/drm/vc4/vc4_kms.c > @@ -643,7 +643,7 @@ vc4_atomic_check(struct drm_device *dev, struct > drm_atomic_state *state) > struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); > unsigned int matching_channels; > > - if (!crtc_state->active) > + if (!crtc_state->enable) > continue; > > /* > -- > 2.26.2 > _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel