Hi Maxime, On 10/8/20 8:25 PM, Maxime Ripard wrote: > The code that assigns HVS channels during atomic_check is starting to grow > a bit big, let's move it into a separate function. > > Signed-off-by: Maxime Ripard <[email protected]>
Thanks for this patch set, I checked all patches well works. All patches: Reviewed-by: Hoegeun Kwon <[email protected]> Tested-by: Hoegeun Kwon <[email protected]> Best regards, Hoegeun > --- > drivers/gpu/drm/vc4/vc4_kms.c | 18 +++++++++++++++--- > 1 file changed, 15 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c > index 149825ff5df8..846fe8b3cb7a 100644 > --- a/drivers/gpu/drm/vc4/vc4_kms.c > +++ b/drivers/gpu/drm/vc4/vc4_kms.c > @@ -612,13 +612,13 @@ static const struct drm_private_state_funcs > vc4_load_tracker_state_funcs = { > #define NUM_OUTPUTS 6 > #define NUM_CHANNELS 3 > > -static int > -vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) > +static int vc4_pv_muxing_atomic_check(struct drm_device *dev, > + struct drm_atomic_state *state) > { > unsigned long unassigned_channels = GENMASK(NUM_CHANNELS - 1, 0); > struct drm_crtc_state *old_crtc_state, *new_crtc_state; > struct drm_crtc *crtc; > - int i, ret; > + unsigned int i; > > /* > * Since the HVS FIFOs are shared across all the pixelvalves and > @@ -691,6 +691,18 @@ vc4_atomic_check(struct drm_device *dev, struct > drm_atomic_state *state) > } > } > > + return 0; > +} > + > +static int > +vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) > +{ > + int ret; > + > + ret = vc4_pv_muxing_atomic_check(dev, state); > + if (ret) > + return ret; > + > ret = vc4_ctm_atomic_check(dev, state); > if (ret < 0) > return ret; _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
