Hi Matt,
[...]
> > -int intel_uncore_setup_mmio(struct intel_uncore *uncore)
> > +int intel_uncore_setup_mmio(struct intel_uncore *uncore, phys_addr_t
> > phys_addr)
> > {
> > struct drm_i915_private *i915 = uncore->i915;
> > - struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> > - int mmio_bar;
> > int mmio_size;
> >
> > - mmio_bar = GRAPHICS_VER(i915) == 2 ? 1 : 0;
> > /*
> > * Before gen4, the registers and the GTT are behind different BARs.
> > * However, from gen4 onwards, the registers and the GTT are shared
> > @@ -2044,7 +2041,7 @@ int intel_uncore_setup_mmio(struct intel_uncore
> > *uncore)
> > else
> > mmio_size = 2 * 1024 * 1024;
> >
> > - uncore->regs = pci_iomap(pdev, mmio_bar, mmio_size);
> > + uncore->regs = ioremap(phys_addr, mmio_size);
>
> Is there a specific reason we switch to ioremap() instead of
> pci_iomap_range()? I.e., we could pass 'phys_offset' rather than
> 'phys_addr' and call
>
> pci_iomap_range(pdev, mmio_bar, phys_offset, mmio_size);
>
> Not that it really matters too much either way as far as I can see;
> ioremap()/iounmap() should work fine too.
this was originally changed by Abdiel (I think) and I left as it
is as I tried to change as less as I could from the original
work.
> Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>
Thank you!
Andi
