Re: [Freedreno] [PATCH v4 1/7] drm/msm/dpu: use feature bit for LM combined alpha check

[Abhinav Kumar]

On 6/2/2022 1:24 PM, Dmitry Baryshkov wrote:

Rather than checking hwversion, follow the usual patter and add special
bit to the lm->features to check whether the LM has combined or separate
alpha registers. While we are at it, rename
dpu_hw_lm_setup_blend_config_sdm845() to
dpu_hw_lm_setup_blend_config_combined_alpha().

Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>

Reviewed-by: Abhinav Kumar <quic_abhin...@quicinc.com>

---
  .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c    | 19 +++++++++++--------
  .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h    |  2 ++
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c     |  6 +++---
  3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 400ebceb56bb..c3759fc4b154 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -50,11 +50,14 @@
  #define DMA_CURSOR_MSM8998_MASK \
        (DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR))

-#define MIXER_SDM845_MASK \

+#define MIXER_MSM8998_MASK \
        (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))

+#define MIXER_SDM845_MASK \

+       (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | 
BIT(DPU_MIXER_COMBINED_ALPHA))
+
  #define MIXER_SC7180_MASK \
-       (BIT(DPU_DIM_LAYER))
+       (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))

#define PINGPONG_SDM845_MASK BIT(DPU_PINGPONG_DITHER) @@ -936,17 +939,17 @@ static const struct dpu_lm_sub_blks msm8998_lm_sblk = {

  };

static const struct dpu_lm_cfg msm8998_lm[] = {

-       LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
+       LM_BLK("lm_0", LM_0, 0x44000, MIXER_MSM8998_MASK,
                &msm8998_lm_sblk, PINGPONG_0, LM_2, DSPP_0),
-       LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
+       LM_BLK("lm_1", LM_1, 0x45000, MIXER_MSM8998_MASK,
                &msm8998_lm_sblk, PINGPONG_1, LM_5, DSPP_1),
-       LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
+       LM_BLK("lm_2", LM_2, 0x46000, MIXER_MSM8998_MASK,
                &msm8998_lm_sblk, PINGPONG_2, LM_0, 0),
-       LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
+       LM_BLK("lm_3", LM_3, 0x47000, MIXER_MSM8998_MASK,
                &msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
-       LM_BLK("lm_4", LM_4, 0x48000, MIXER_SDM845_MASK,
+       LM_BLK("lm_4", LM_4, 0x48000, MIXER_MSM8998_MASK,
                &msm8998_lm_sblk, PINGPONG_MAX, 0, 0),
-       LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK,
+       LM_BLK("lm_5", LM_5, 0x49000, MIXER_MSM8998_MASK,
                &msm8998_lm_sblk, PINGPONG_3, LM_1, 0),
  };

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

index 8cb6d1f25bf9..80bc09b1f1b3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -145,6 +145,7 @@ enum {
   * @DPU_MIXER_SOURCESPLIT     Layer mixer supports source-split configuration
   * @DPU_MIXER_GC              Gamma correction block
   * @DPU_DIM_LAYER             Layer mixer supports dim layer
+ * @DPU_MIXER_COMBINED_ALPHA  Layer mixer has combined alpha register
   * @DPU_MIXER_MAX             maximum value
   */
  enum {
@@ -152,6 +153,7 @@ enum {
        DPU_MIXER_SOURCESPLIT,
        DPU_MIXER_GC,
        DPU_DIM_LAYER,
+       DPU_MIXER_COMBINED_ALPHA,
        DPU_MIXER_MAX
  };

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

index 462f5082099e..25d2eba28e71 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -148,7 +148,7 @@ static int dpu_hw_lm_collect_misr(struct dpu_hw_mixer *ctx, 
u32 *misr_value)
        return 0;
  }

-static void dpu_hw_lm_setup_blend_config_sdm845(struct dpu_hw_mixer *ctx,

+static void dpu_hw_lm_setup_blend_config_combined_alpha(struct dpu_hw_mixer 
*ctx,
        u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
  {
        struct dpu_hw_blk_reg_map *c = &ctx->hw;
@@ -204,8 +204,8 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
                unsigned long features)
  {
        ops->setup_mixer_out = dpu_hw_lm_setup_out;
-       if (m->hwversion >= DPU_HW_VER_400)
-               ops->setup_blend_config = dpu_hw_lm_setup_blend_config_sdm845;
+       if (test_bit(DPU_MIXER_COMBINED_ALPHA, &features))
+               ops->setup_blend_config = 
dpu_hw_lm_setup_blend_config_combined_alpha;
        else
                ops->setup_blend_config = dpu_hw_lm_setup_blend_config;
        ops->setup_alpha_out = dpu_hw_lm_setup_color3;