[PATCH] drm/i915: Correct ss -> steering calculation for pre-Xe_HP platforms

[Matt Roper]

Accidental use of a "SLICE" macro where a "SUBSLICE" macro was intended
causes the group ID for steering to be calculated incorrectly on
pre-Xe_HP platforms.

Fixes: 9a92732f040a ("drm/i915/gt: Add general DSS steering iterator to 
intel_gt_mcr")
Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c 
b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
index f8c64ab9d3ca..e79405a45312 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
@@ -515,7 +515,7 @@ void intel_gt_mcr_get_ss_steering(struct intel_gt *gt, 
unsigned int dss,
                *group = dss / GEN_DSS_PER_GSLICE;
                *instance = dss % GEN_DSS_PER_GSLICE;
        } else {
-               *group = dss / GEN_MAX_HSW_SLICES;
+               *group = dss / GEN_MAX_SS_PER_HSW_SLICE;
                *instance = dss % GEN_MAX_SS_PER_HSW_SLICE;
                return;
        }
-- 
2.36.1