The indentation of statements in the same curly bracket should be consistent.
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1890 Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1891 Reported-by: Abaci Robot <ab...@linux.alibaba.com> Signed-off-by: Yang Li <yang....@linux.alibaba.com> --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 5b5d952b2b8c..4ac8e4fcba77 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2151,8 +2151,8 @@ static int dcn10_align_pixel_clocks(struct dc *dc, int group_size, dc->res_pool->dp_clock_source->funcs->get_pixel_clk_frequency_100hz( dc->res_pool->dp_clock_source, grouped_pipes[i]->stream_res.tg->inst, &pclk); - grouped_pipes[i]->stream->timing.pix_clk_100hz = - pclk*get_clock_divider(grouped_pipes[i], false); + grouped_pipes[i]->stream->timing.pix_clk_100hz = + pclk*get_clock_divider(grouped_pipes[i], false); if (master == -1) master = i; } @@ -2206,7 +2206,7 @@ void dcn10_enable_vblanks_synchronization( grouped_pipes[i]->stream->timing.pix_clk_100hz, get_clock_divider(grouped_pipes[master], false), get_clock_divider(grouped_pipes[i], false)); - grouped_pipes[i]->stream->vblank_synchronized = true; + grouped_pipes[i]->stream->vblank_synchronized = true; } grouped_pipes[master]->stream->vblank_synchronized = true; DC_SYNC_INFO("Sync complete\n"); -- 2.20.1.7.g153144c
