Add register constants for the framebuffer scanout addresses and update the related helper functions. No functional changes.
Signed-off-by: Thomas Zimmermann <[email protected]> --- drivers/gpu/drm/udl/udl_modeset.c | 28 ++++++++++++++++++++-------- drivers/gpu/drm/udl/udl_proto.h | 8 ++++++++ 2 files changed, 28 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/udl/udl_modeset.c b/drivers/gpu/drm/udl/udl_modeset.c index b6aebfaae03d..df0b70f3ddf1 100644 --- a/drivers/gpu/drm/udl/udl_modeset.c +++ b/drivers/gpu/drm/udl/udl_modeset.c @@ -59,23 +59,35 @@ static char *udl_set_color_depth(char *buf, u8 selection) return udl_set_register(buf, UDL_REG_COLORDEPTH, selection); } -static char *udl_set_base16bpp(char *wrptr, u32 base) +static char *udl_set_base16bpp(char *buf, u32 base) { /* the base pointer is 16 bits wide, 0x20 is hi byte. */ - wrptr = udl_set_register(wrptr, 0x20, base >> 16); - wrptr = udl_set_register(wrptr, 0x21, base >> 8); - return udl_set_register(wrptr, 0x22, base); + u8 reg20 = (base & 0xff0000) >> 16; + u8 reg21 = (base & 0x00ff00) >> 8; + u8 reg22 = (base & 0x0000ff); + + buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR2, reg20); + buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR1, reg21); + buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR0, reg22); + + return buf; } /* * DisplayLink HW has separate 16bpp and 8bpp framebuffers. * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer */ -static char *udl_set_base8bpp(char *wrptr, u32 base) +static char *udl_set_base8bpp(char *buf, u32 base) { - wrptr = udl_set_register(wrptr, 0x26, base >> 16); - wrptr = udl_set_register(wrptr, 0x27, base >> 8); - return udl_set_register(wrptr, 0x28, base); + u8 reg26 = (base & 0xff0000) >> 16; + u8 reg27 = (base & 0x00ff00) >> 8; + u8 reg28 = (base & 0x0000ff); + + buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR2, reg26); + buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR1, reg27); + buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR0, reg28); + + return buf; } static char *udl_set_register_16(char *wrptr, u8 reg, u16 value) diff --git a/drivers/gpu/drm/udl/udl_proto.h b/drivers/gpu/drm/udl/udl_proto.h index 8e7d1a090644..3e7fcb43cb04 100644 --- a/drivers/gpu/drm/udl/udl_proto.h +++ b/drivers/gpu/drm/udl/udl_proto.h @@ -31,6 +31,14 @@ #define UDL_BLANKMODE_HSYNC_OFF 0x05 /* hsync off, blanked */ #define UDL_BLANKMODE_POWERDOWN 0x07 /* powered off; requires modeset */ +/* Framebuffer address */ +#define UDL_REG_BASE16BPP_ADDR2 0x20 +#define UDL_REG_BASE16BPP_ADDR1 0x21 +#define UDL_REG_BASE16BPP_ADDR0 0x22 +#define UDL_REG_BASE8BPP_ADDR2 0x26 +#define UDL_REG_BASE8BPP_ADDR1 0x27 +#define UDL_REG_BASE8BPP_ADDR0 0x28 + /* Lock/unlock video registers */ #define UDL_REG_VIDREG 0xff #define UDL_VIDREG_LOCK 0x00 -- 2.37.3
