[PATCH v2 04/50] drm/msm/dpu: fix len of sc7180 ctl blocks

[Dmitry Baryshkov]

Change sc7180's ctl block len to 0x1dc.

Fixes: 7bdc0c4b8126 ("msm:disp:dpu1: add support for display for SC7180 target")
Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index e8b12788dc94..47de609e2279 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -831,19 +831,19 @@ static const struct dpu_ctl_cfg sdm845_ctl[] = {
 static const struct dpu_ctl_cfg sc7180_ctl[] = {
        {
        .name = "ctl_0", .id = CTL_0,
-       .base = 0x1000, .len = 0xE4,
+       .base = 0x1000, .len = 0x1dc,
        .features = BIT(DPU_CTL_ACTIVE_CFG),
        .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
        },
        {
        .name = "ctl_1", .id = CTL_1,
-       .base = 0x1200, .len = 0xE4,
+       .base = 0x1200, .len = 0x1dc,
        .features = BIT(DPU_CTL_ACTIVE_CFG),
        .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
        },
        {
        .name = "ctl_2", .id = CTL_2,
-       .base = 0x1400, .len = 0xE4,
+       .base = 0x1400, .len = 0x1dc,
        .features = BIT(DPU_CTL_ACTIVE_CFG),
        .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11),
        },
-- 
2.39.1