Correct the math for slice_last_group_size so that it matches the
calculations downstream.

Signed-off-by: Jessica Zhang <quic_jessz...@quicinc.com>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index 648c530b5d05..1a1a0f6523f6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
@@ -56,7 +56,11 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
        if (is_cmd_mode)
                initial_lines += 1;
 
-       slice_last_group_size = 3 - (dsc->slice_width % 3);
+       slice_last_group_size = dsc->slice_width % 3;
+
+       if (slice_last_group_size == 0)
+               slice_last_group_size = 3;
+
        data = (initial_lines << 20);
        data |= ((slice_last_group_size - 1) << 18);
        /* bpp is 6.4 format, 4 LSBs bits are for fractional part */

-- 
2.39.2

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