On 2023-05-17 16:22:37, Abhinav Kumar wrote:
<snip>
> >> @@ -529,6 +539,19 @@ static const struct dpu_pingpong_sub_blks
> >> sc7280_pp_sblk = {
> >> .features = _features, \
> >> }
> >>
> >> +/*
> >> + * NOTE: Each display compression engine (DCE) contains dual hard
> >> + * slice DSC encoders so both share same base address but with
> >> + * its own different sub block address.
> >> + */
> >
> > I still think this comment is superfluous (and doesn't even apply
> > generically, see i.e. sc7280) and should best be kept exclusively in the
> > SoC-specific catalog files.
> >
> > - Marijn
> >
>
> sc7280 is the only exception as it has only one encoder. But, by and
> large, for all other chipsets this is true and hence kept here.
>
> The main reason for this comment is people should not get confused that
> how come two DSC encoders have the same base address.
And that's why the comment is already placed in the SoC-specific catalog
files where a duplicate base address is visible. It is not visible
here.
- Marijn
> >> +#define DSC_BLK_1_2(_name, _id, _base, _len, _features, _sblk) \
> >> + {\
> >> + .name = _name, .id = _id, \
> >> + .base = _base, .len = _len, \
> >> + .features = BIT(DPU_DSC_HW_REV_1_2) | _features, \
> >> + .sblk = &_sblk, \
> >> + }
> >> +
> >> /*************************************************************
> >> * INTF sub blocks config
> >> *************************************************************/
> >> --
> >> 2.7.4
> >>
