Re: [PATCH v3 02/19] drm/msm/dpu: always use MSM_DP/DSI_CONTROLLER_n

[Dmitry Baryshkov]

On 17/06/2023 01:03, Marijn Suijten wrote:
On 2023-06-16 13:03:00, Dmitry Baryshkov wrote:
<snip>
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
index 8da424eaee6a..8fa9d83a539d 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
@@ -169,11 +169,11 @@ static const struct dpu_intf_cfg sm8350_intf[] = {
        INTF_BLK("intf_0", INTF_0, 0x34000, 0x280, INTF_DP, 
MSM_DP_CONTROLLER_0, 24, INTF_SC7280_MASK,
                        DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24),
                        DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25)),
-       INTF_BLK_DSI_TE("intf_1", INTF_1, 0x35000, 0x2c4, INTF_DSI, 0, 24, 
INTF_SC7280_MASK,
+       INTF_BLK_DSI_TE("intf_1", INTF_1, 0x35000, 0x2c4, INTF_DSI, 
MSM_DSI_CONTROLLER_0, 24, INTF_SC7280_MASK,
                        DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
                        DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
                        DPU_IRQ_IDX(MDP_INTF1_7xxx_TEAR_INTR, 2)),

This doesn't apply cleanly on top of your interupt rework series: do you
still intend to land that?

Yes, but most likely after this series. If everything goes well, I want 
to land this series, DSI DSC docs and last minute fixes to 6.5, 
everything else goes into 6.6 (as its review was not started).


-       INTF_BLK_DSI_TE("intf_2", INTF_2, 0x36000, 0x2c4, INTF_DSI, 1, 24, 
INTF_SC7280_MASK,
+       INTF_BLK_DSI_TE("intf_2", INTF_2, 0x36000, 0x2c4, INTF_DSI, 
MSM_DSI_CONTROLLER_1, 24, INTF_SC7280_MASK,
                        DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 28),
                        DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 29),
                        DPU_IRQ_IDX(MDP_INTF2_7xxx_TEAR_INTR, 2)),

<snip, same for the other catalogs>

- Marijn

--
With best wishes
Dmitry