To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.

Tested-by: Marijn Suijten <marijn.suij...@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 .../drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 14 ++++++++++++--
 .../drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 14 ++++++++++++--
 .../drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 14 ++++++++++++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 18 ------------------
 4 files changed, 36 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
index c8f4c6326a1a..9148d7da62e4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
@@ -323,8 +323,18 @@ static const struct dpu_intf_cfg sm8250_intf[] = {
 };
 
 static const struct dpu_wb_cfg sm8250_wb[] = {
-       WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
-                       VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
 };
 
 static const struct dpu_perf_cfg sm8250_perf_data = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
index d7d117e3af36..904c758a60df 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
@@ -148,8 +148,18 @@ static const struct dpu_intf_cfg sc7180_intf[] = {
 };
 
 static const struct dpu_wb_cfg sc7180_wb[] = {
-       WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
-                       VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
 };
 
 static const struct dpu_perf_cfg sc7180_perf_data = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h 
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
index 3b67010f336b..7b5c9a77b102 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
@@ -176,8 +176,18 @@ static const struct dpu_dsc_cfg sc7280_dsc[] = {
 };
 
 static const struct dpu_wb_cfg sc7280_wb[] = {
-       WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
-                       VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
 };
 
 static const struct dpu_intf_cfg sc7280_intf[] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 3ea63ca358a4..d2bca1ec0e63 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -493,24 +493,6 @@ static const struct dpu_dsc_sub_blks dsc_sblk_1 = {
        .intr_tear_rd_ptr = _tear_rd_ptr, \
        }
 
-/*************************************************************
- * Writeback blocks config
- *************************************************************/
-#define WB_BLK(_name, _id, _base, _features, _clk_ctrl, \
-               __xin_id, vbif_id, _reg, _max_linewidth, _wb_done_bit) \
-       { \
-       .name = _name, .id = _id, \
-       .base = _base, .len = 0x2c8, \
-       .features = _features, \
-       .format_list = wb2_formats, \
-       .num_formats = ARRAY_SIZE(wb2_formats), \
-       .clk_ctrl = _clk_ctrl, \
-       .xin_id = __xin_id, \
-       .vbif_idx = vbif_id, \
-       .maxlinewidth = _max_linewidth, \
-       .intr_wb_done = DPU_IRQ_IDX(_reg, _wb_done_bit) \
-       }
-
 /*************************************************************
  * VBIF sub blocks config
  *************************************************************/
-- 
2.39.2

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