Hi Andrzej,
On Mon, Jul 24, 2023 at 11:42:16AM +0200, Andrzej Hajda wrote:
> On 21.07.2023 18:15, Andi Shyti wrote:
> > Perform some refactoring with the purpose of keeping in one
> > single place all the operations around the aux table
> > invalidation.
> >
> > With this refactoring add more engines where the invalidation
> > should be performed.
> >
> > Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
> > engines")
> > Signed-off-by: Andi Shyti <[email protected]>
> > Cc: Jonathan Cavitt <[email protected]>
> > Cc: Matt Roper <[email protected]>
> > Cc: <[email protected]> # v5.8+
> > ---
> > drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 53 ++++++++++++++----------
> > drivers/gpu/drm/i915/gt/gen8_engine_cs.h | 3 +-
> > drivers/gpu/drm/i915/gt/intel_lrc.c | 17 +-------
> > 3 files changed, 36 insertions(+), 37 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > index 6daf7d99700e0..d33462387d1c6 100644
> > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > @@ -178,9 +178,36 @@ static bool gen12_needs_ccs_aux_inv(struct
> > intel_engine_cs *engine)
> > return !HAS_FLAT_CCS(engine->i915);
> > }
> > -u32 *gen12_emit_aux_table_inv(struct intel_gt *gt, u32 *cs, const
> > i915_reg_t inv_reg)
> > +static i915_reg_t gen12_get_aux_inv_reg(struct intel_engine_cs *engine)
> > +{
> > + if (!gen12_needs_ccs_aux_inv(engine))
> > + return INVALID_MMIO_REG;
> > +
> > + switch (engine->id) {
> > + case RCS0:
> > + return GEN12_CCS_AUX_INV;
> > + case BCS0:
> > + return GEN12_BCS0_AUX_INV;
>
> Shouldn't be MTL only?
> With that explained/fixed:
this is actually difficult to be called by the wrong engine, so
that the MTL check is a bit pedantic... I can still add it
though.
> Reviewed-by: Andrzej Hajda <[email protected]>
Thanks,
Andi
