On Tue, 2023-08-15 at 13:29 -0700, Teres Alexis, Alan Previn wrote:
> Update the max GSC-fw response time to match updated internal
> fw specs. Because this response time is an SLA on the firmware,
> not inclusive of i915->GuC->HW handoff latency, when submitting
> requests to the GSC fw via intel_gsc_uc_heci_cmd_submit_nonpriv,
> start the count after the request hits the GSC command streamer.
>
> Signed-off-by: Alan Previn <alan.previn.teres.ale...@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 3 +++
> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h | 6 +++---
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
> b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
> index 89ed5ee9cded..ae45855594ac 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c
> @@ -186,6 +186,9 @@ intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc
> *gsc,
> i915_request_add(rq);
>
> if (!err) {
> + if (wait_for(i915_request_started(rq), 200))
> + drm_dbg(&gsc_uc_to_gt(gsc)->i915->drm,
> + "Delay in gsc-heci-non-priv submission to
> gsccs-hw");
alan: offline discussion with Daniele, Daniele provided the following review
comments:
We should add this wait-check for both priv and non-priv but we should increase
the
timeout to be more than the guaranteed fw response time of 1 other message
(since we
have a total of 2 contexts that could be sending messages concurrently at any
time
including this one)... so maybe timeout of the new GSC_REPLY_LATENCY_MS + 150.
More importantly, he highlighted the fact that we should wait for the
request-started
AND ensure there as no error in request status.
[snip]
