Since, calling dcn20_adjust_freesync_v_startup() on DCN3.1+ ASICs
can cause the display to flicker and underflow to occur we shouldn't
call it for them. So, ensure that the DCN version is less than
DCN_VERSION_3_1 before calling dcn20_adjust_freesync_v_startup().
Cc: sta...@vger.kernel.org
Signed-off-by: Hamza Mahfooz <hamza.mahf...@amd.com>
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
index 1bfdf0271fdf..a68fb45ed487 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
@@ -1099,7 +1099,8 @@ void dcn20_calculate_dlg_params(struct dc *dc,
context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz =
pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;
context->res_ctx.pipe_ctx[i].pipe_dlg_param =
pipes[pipe_idx].pipe.dest;
- if
(context->res_ctx.pipe_ctx[i].stream->adaptive_sync_infopacket.valid)
+ if (dc->ctx->dce_version < DCN_VERSION_3_1 &&
+
context->res_ctx.pipe_ctx[i].stream->adaptive_sync_infopacket.valid)
dcn20_adjust_freesync_v_startup(
&context->res_ctx.pipe_ctx[i].stream->timing,
&context->res_ctx.pipe_ctx[i].pipe_dlg_param.vstartup_start);
--
2.41.0
