On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote: > We read RENDER_HEAD as a part of the flush. If GT is in > deeper sleep states, this could lead to read errors since we are > not using a forcewake. Safer to read a shadowed register instead.
IIRC shadowing is only thing for writes, not reads. > > Cc: John Harrison <john.c.harri...@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com> > Signed-off-by: Vinay Belgaumkar <vinay.belgaum...@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c > b/drivers/gpu/drm/i915/gt/intel_gt.c > index ed32bf5b1546..ea814ea5f700 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -451,7 +451,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt) > > spin_lock_irqsave(&uncore->lock, flags); > intel_uncore_posting_read_fw(uncore, > - RING_HEAD(RENDER_RING_BASE)); > + RING_TAIL(RENDER_RING_BASE)); > spin_unlock_irqrestore(&uncore->lock, flags); > } > } > -- > 2.38.1 -- Ville Syrjälä Intel
