On 21.01.2024 20:41, Adam Skladowski wrote:
> Add MDSS nodes to support displays on MSM8976 SoC.
> 
> Signed-off-by: Adam Skladowski <a39....@gmail.com>
> ---
>  arch/arm64/boot/dts/qcom/msm8976.dtsi | 268 +++++++++++++++++++++++++-
>  1 file changed, 264 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi 
> b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> index 118174cfd4d3..2d71ce34f00e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> @@ -785,10 +785,10 @@ gcc: clock-controller@1800000 {
>  
>                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
>                                <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
> -                              <0>,
> -                              <0>,
> -                              <0>,
> -                              <0>;
> +                              <&mdss_dsi0_phy 1>,
> +                              <&mdss_dsi0_phy 0>,
> +                              <&mdss_dsi1_phy 1>,
> +                              <&mdss_dsi1_phy 0>;
>                       clock-names = "xo",
>                                     "xo_a",
>                                     "dsi0pll",
> @@ -808,6 +808,266 @@ tcsr: syscon@1937000 {
>                       reg = <0x01937000 0x30000>;
>               };
>  
> +             mdss: display-subsystem@1a00000 {
> +                     compatible = "qcom,mdss";
> +
> +                     reg = <0x01a00000 0x1000>,
> +                           <0x01ab0000 0x3000>;
> +                     reg-names = "mdss_phys", "vbif_phys";
> +
> +                     power-domains = <&gcc MDSS_GDSC>;
> +                     interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
> +
> +                     interrupt-controller;
> +                     #interrupt-cells = <1>;
> +
> +                     clocks = <&gcc GCC_MDSS_AHB_CLK>,
> +                              <&gcc GCC_MDSS_AXI_CLK>,
> +                              <&gcc GCC_MDSS_VSYNC_CLK>,
> +                               <&gcc GCC_MDSS_MDP_CLK>;

The last entry is misaligned

[...]

> +                                     port@0 {
> +                                             reg = <0>;

Please add a newline between properties and subnodes

And then the rest looks good, I think!

Konrad

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