[PATCH v5 02/10] drm: zynqmp_dp: Rearrange zynqmp_dp for better padding

[Sean Anderson]

Sort the members of struct zynqmp_dp to reduce padding necessary for
alignment.

Signed-off-by: Sean Anderson <sean.ander...@linux.dev>
---

(no changes since v2)

Changes in v2:
- New

 drivers/gpu/drm/xlnx/zynqmp_dp.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c
index 9df068a413f3..12a8248ed125 100644
--- a/drivers/gpu/drm/xlnx/zynqmp_dp.c
+++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c
@@ -256,10 +256,10 @@ struct zynqmp_dp_link_config {
  * @fmt: format identifier string
  */
 struct zynqmp_dp_mode {
-       u8 bw_code;
-       u8 lane_cnt;
-       int pclock;
        const char *fmt;
+       int pclock;
+       u8 bw_code;
+       u8 lane_cnt;
 };
 
 /**
@@ -296,27 +296,27 @@ struct zynqmp_dp_config {
  * @train_set: set of training data
  */
 struct zynqmp_dp {
+       struct drm_dp_aux aux;
+       struct drm_bridge bridge;
+       struct delayed_work hpd_work;
+
+       struct drm_bridge *next_bridge;
        struct device *dev;
        struct zynqmp_dpsub *dpsub;
        void __iomem *iomem;
        struct reset_control *reset;
-       int irq;
-
-       struct drm_bridge bridge;
-       struct drm_bridge *next_bridge;
-
-       struct zynqmp_dp_config config;
-       struct drm_dp_aux aux;
        struct phy *phy[ZYNQMP_DP_MAX_LANES];
-       u8 num_lanes;
-       struct delayed_work hpd_work;
+
        enum drm_connector_status status;
+       int irq;
        bool enabled;
 
-       u8 dpcd[DP_RECEIVER_CAP_SIZE];
-       struct zynqmp_dp_link_config link_config;
        struct zynqmp_dp_mode mode;
+       struct zynqmp_dp_link_config link_config;
+       struct zynqmp_dp_config config;
+       u8 dpcd[DP_RECEIVER_CAP_SIZE];
        u8 train_set[ZYNQMP_DP_MAX_LANES];
+       u8 num_lanes;
 };
 
 static inline struct zynqmp_dp *bridge_to_dp(struct drm_bridge *bridge)
-- 
2.35.1.1320.gc452695387.dirty