Il 23/05/24 14:49, Alexandre Mergnat ha scritto:
- Add aliases for each display components to help display drivers.
- Add the Display Pulse Width Modulation (DISP_PWM) to provide PWM signals
for the LED driver of mobile LCM.
- Add the MIPI Display Serial Interface (DSI) PHY support. (up to 4-lane
output)
- Add the display mutex support.
- Add the following display component support:
- OVL0 (Overlay)
- RDMA0 (Data Path Read DMA)
- Color0
- CCorr0 (Color Correction)
- AAL0 (Adaptive Ambient Light)
- GAMMA0
- Dither0
- DSI0 (Display Serial Interface)
- RDMA1 (Data Path Read DMA)
- DPI0 (Display Parallel Interface)
Signed-off-by: Alexandre Mergnat <amerg...@baylibre.com>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 336 +++++++++++++++++++++++++++++++
1 file changed, 336 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 24581f7410aa..9f88645141d6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/mediatek,mt8365-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/memory/mediatek,mt8365-larb-port.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/power/mediatek,mt8365-power.h>
..snip..
+
+ rdma1: rdma@14016000 {
+ compatible = "mediatek,mt8365-disp-rdma",
"mediatek,mt8183-disp-rdma";
+ reg = <0 0x14016000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_MM_DISP_RDMA1>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
+ iommus = <&iommu M4U_PORT_DISP_RDMA1>;
+ mediatek,rdma-fifo-size = <2048>;
+ power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
Hey Alex,
only one nit here - trying to get the formatting consistent between devicetrees
for
all MediaTek SoCs.
VDOSYS/MMSYS:
port {
#address-cells = <1>;
#size-cells = <0>;
vdosys0_ep_main: endpoint@0 {
reg = <0>;
remote-endpoint = <&ovl0_in>;
};
};
RDMA/OVL/other components:
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
rdma0_in: endpoint {
remote-endpoint = <&ovl0_out>;
};
};
Can you please follow the style that I've shown up there for all of the ports
nodes and resend the devicetree commits?
P.S.: This is a paste from the MT8195 devicetree that I'll send soon, probably
tomorrow or something along those lines.
After which, the devicetree looks ok to me.
Thanks,
Angelo
