On 10/17/2024 8:58 AM, Jacek Lawrynowicz wrote:
From: Karol Wachowski <karol.wachow...@intel.com>
Secondary preemption buffer is accessible by NPU's DMA and can be
allocated with addresses above 4 GB. Move secondary preemption buffer
allocation from SHAVE range which is much smaller (2GB) to DMA range.
This allows to allocate more command queues with corresponding
preemption buffers without running out of address range.
Signed-off-by: Karol Wachowski <karol.wachow...@intel.com>
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynow...@linux.intel.com>
Signed-off-by: Jacek Lawrynowicz <jacek.lawrynow...@linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jh...@quicinc.com>
