On Wed, Apr 9, 2025, at 09:07, Arnd Bergmann wrote:
> On Tue, Apr 8, 2025, at 19:51, Arnd Bergmann wrote:
>> From: Arnd Bergmann <a...@arndb.de>
>>
>> clang-16 and earlier complain about what it thinks might be an out of
>> range number:
>>
>> drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c:348:8: error: call to
>> __compiletime_assert_579 declared with 'error' attribute: FIELD_PREP:
>> value too large for the field
>> PHY_SYS_RATIO(tmp));
>> ^
>> drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c:90:27: note: expanded
>> from macro 'PHY_SYS_RATIO'
>> #define PHY_SYS_RATIO(x) FIELD_PREP(GENMASK(16, 0), x)
>>
>
> I still see the same build failure in some other configurations even
> with this patch. Please disregard this version, I'll try to come
> up with a better one.
I couldn't come up with anything that actually worked, other than
the hack below, which just works around the compiletime error
in FIELD_PREP(), but doesn't look like a proper fix.
If anyone else has any ideas, I can test their patch.
Arnd
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c
b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c
index c76f5f2e74d1..8ba528462ede 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c
@@ -344,7 +344,7 @@ static void dw_mipi_dsi2_phy_ratio_cfg(struct dw_mipi_dsi2
*dsi2)
*/
tmp = DIV_ROUND_CLOSEST_ULL(phy_hsclk << 16, sys_clk);
regmap_write(dsi2->regmap, DSI2_PHY_SYS_RATIO_MAN_CFG,
- PHY_SYS_RATIO(tmp));
+ PHY_SYS_RATIO(tmp & GENMASK(16, 0)));
}
static void dw_mipi_dsi2_lp2hs_or_hs2lp_cfg(struct dw_mipi_dsi2 *dsi2)
