Hello Adrián, Thank you for reaching out about the matter. Could you please clarify what you would like me to elaborate on? I have responded to most, if not all, of the comments you raised in that review, including providing more information about the approach (please see [1] for more details on the uAPI apprach).
I am also in the process of publishing a Mesa MR corresponding to the v4 of the patch series, which will be available. It includes additional fixes discussed in RFC v2, and I will provide a more detailed change log. Kind regards, Lukas Zapolskas [1]: https://lore.kernel.org/dri-devel/55fb6aa6-89dc-404c-89fc-5c56d15d8...@arm.com/ On 07/05/2025 20:54, Adrián Larumbe wrote: > I wanted to review this series for quite some time but lately have found > myself caught up in quite > a few other things. I've had a look into it last week, but before I delve > into it any further, I was > wondering whether you could take some time to go over the questions and > comments I left in the review > for the previous patch series version. > > That way I could know what changes you introduced in response to issues I > raised, and which ones are > due to a rethinking of the whole design. > > I remember some of the questions I posed dealt with a genuine lack of > understanding of the way > performance counters in CSF GPUs operate, so if you could find some time to > answer them or else > point me to the right sections of the TRM I'd find the review of this latest > revision a lot easier. > > Kind Regards, > Adrian Larumbe
