On 16/05/2025 18:53, Tomeu Vizoso wrote:
> See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).
>
> This is a derivative of NVIDIA's NVDLA, but with its own front-end
> processor.
>
> The IP is divided in three cores, programmed independently. The first
> core though is special, requiring to be powered on before any of the
> others can be used.
>
> The IOMMU of the first core is also special in that it has two subunits
> (read/write?) that need to be programmed in sync.
>
> v2:
> - Have one device for each NPU core (Sebastian Reichel)
> - Have one device for each IOMMU (Sebastian Reichel)
> - Correctly sort nodes (Diederik de Haas)
> - Add rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
>
> v3:
> - Adapt to a split of the register block in the DT bindings (Nicolas
> Frattaroli)
>
> Signed-off-by: Tomeu Vizoso <to...@tomeuvizoso.net>
> ---
> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 85
> +++++++++++++++++++++++++++
> 1 file changed, 85 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> index
> 1e18ad93ba0ebdad31642b88ff0f90ef4e8dc76f..7b961ab838212fad8e4a70390fdc917a828433a9
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> @@ -1136,6 +1136,91 @@ power-domain@RK3588_PD_SDMMC {
> };
> };
>
> + rknn_core_top: npu-core@fdab0000 {
npu@
> + compatible = "rockchip,rk3588-rknn-core-top",
> "rockchip,rknn-core-top";
You never tested this. Test before sending instead of relying on us or
after merging.
Best regards,
Krzysztof
