[PATCH v4 10/10] arm64: dts: rockchip: enable NPU on ROCK 5B

[Tomeu Vizoso]

From: Nicolas Frattaroli <nicolas.frattar...@collabora.com>

The NPU on the ROCK5B uses the same regulator for both the sram-supply
and the npu's supply. Add this regulator, and enable all the NPU bits.
Also add the regulator as a domain-supply to the pd_npu power domain.

Signed-off-by: Nicolas Frattaroli <nicolas.frattar...@collabora.com>
Signed-off-by: Tomeu Vizoso <to...@tomeuvizoso.net>
---
 arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 56 +++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts 
b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index 
d22068475c5dc6cb885f878f3f527a66edf1ba70..49500f7cbcb14af4919a6c1997e9e53a01d84973
 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -316,6 +316,28 @@ regulator-state-mem {
        };
 };
 
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1m2_xfer>;
+       status = "okay";
+
+       vdd_npu_s0: regulator@42 {
+               compatible = "rockchip,rk8602";
+               reg = <0x42>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-name = "vdd_npu_s0";
+               regulator-boot-on;
+               regulator-min-microvolt = <550000>;
+               regulator-max-microvolt = <950000>;
+               regulator-ramp-delay = <2300>;
+               vin-supply = <&vcc5v0_sys>;
+
+               regulator-state-mem {
+                       regulator-off-in-suspend;
+               };
+       };
+};
+
 &i2c6 {
        status = "okay";
 
@@ -440,6 +462,10 @@ &pd_gpu {
        domain-supply = <&vdd_gpu_s0>;
 };
 
+&pd_npu {
+       domain-supply = <&vdd_npu_s0>;
+};
+
 &pinctrl {
        hdmirx {
                hdmirx_hpd: hdmirx-5v-detection {
@@ -500,6 +526,36 @@ &pwm1 {
        status = "okay";
 };
 
+&rknn_core_top {
+       npu-supply = <&vdd_npu_s0>;
+       sram-supply = <&vdd_npu_s0>;
+       status = "okay";
+};
+
+&rknn_core_1 {
+       npu-supply = <&vdd_npu_s0>;
+       sram-supply = <&vdd_npu_s0>;
+       status = "okay";
+};
+
+&rknn_core_2 {
+       npu-supply = <&vdd_npu_s0>;
+       sram-supply = <&vdd_npu_s0>;
+       status = "okay";
+};
+
+&rknn_mmu_top {
+       status = "okay";
+};
+
+&rknn_mmu_1 {
+       status = "okay";
+};
+
+&rknn_mmu_2 {
+       status = "okay";
+};
+
 &saradc {
        vref-supply = <&avcc_1v8_s0>;
        status = "okay";

-- 
2.49.0