Hi,
On 07/05/2025 21:06, Devarsh Thakkar wrote:
This adds support for DSS subsystem present in TI's AM62L SoC
which supports single display pipeline with DPI output which
is also routed to DSI Tx controller within the SoC.
I think this looks fine. I did some quick tests, and didn't notice
anything amiss. I'm still somewhat wary about the indexing we do wrt.
planes, and the possibility to introduce hard-to-find bugs by using the
wrong index. We can try to improve this on top.
Reviewed-by: Tomi Valkeinen <tomi.valkei...@ideasonboard.com>
I'll do a few more tests, and unless there are no other commets I'll
push to drm-misc tomorrow.
Tomi
