On Tue, May 20, 2025 at 09:57:38AM +0200, neil.armstr...@linaro.org wrote: > On 19/05/2025 18:04, Dmitry Baryshkov wrote: > > From: Dmitry Baryshkov <dmitry.barysh...@linaro.org> > > > > Continue migration to the MDSS-revision based checks and replace > > DPU_CTL_ACTIVE_CFG feature bit with the core_major_ver >= 5 check. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org> > > Reviewed-by: Abhinav Kumar <quic_abhin...@quicinc.com> > > Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@oss.qualcomm.com> > > --- > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 6 ------ > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 6 ------ > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 6 ------ > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 6 ------ > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 6 ------ > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 6 ------ > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 3 --- > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 1 - > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 4 ---- > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 1 - > > drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h | 1 - > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 +- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 7 ++----- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 +-- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 - > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 2 +- > > 17 files changed, 6 insertions(+), 57 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > index > > a0ba55ab3c894c200225fe48ec6214ae4135d059..25ba5d9bfff2b3f7a5054ae26511d05917f72d8b > > 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c > > @@ -69,7 +69,7 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg( > > ctl->ops.setup_intf_cfg(ctl, &intf_cfg); > > /* setup which pp blk will connect to this intf */ > > - if (test_bit(DPU_CTL_ACTIVE_CFG, &ctl->caps->features) && > > phys_enc->hw_intf->ops.bind_pingpong_blk) > > + if (phys_enc->hw_intf->ops.bind_pingpong_blk) > > Why did you drop the version test here ?
bind_pingpong_blk is only available since DPU 5.x, the same set of hardware as the DPU having DPU_CTL_ACTIVE_CFG. -- With best wishes Dmitry
